component
ADS7253IPWR
Public Made by Adomby adom
Texas Instruments Analog To Digital Converters (ADCs), TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"name": "AINP_A",
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"description": "Positive analog input for channel A (single-ended or pseudo-differential); the analog input range is GND-referenced to REFGND_A from -0.3 V to AVDD + 0.3 V."
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{
"number": "2",
"name": "AINM_A",
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"description": "Negative analog input for channel A (single-ended or pseudo-differential); the analog input range relative to REFGND_A is -0.3 V to AVDD + 0.3 V."
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{
"number": "3",
"name": "REFIO_A",
"type": "bidirectional",
"description": "Reference voltage input/output for channel A, part of the programmable buffered 2.5-V internal reference; the voltage range relative to REFGND_A is -0.3 V to AVDD + 0.3 V."
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{
"number": "4",
"name": "REFGND_A",
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"description": "Reference ground potential for channel A; the magnitude of the difference |REFGND_A - GND| must not exceed 0.3 V."
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{
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"description": "Reference ground potential for channel B; the magnitude of the difference |REFGND_B - GND| must not exceed 0.3 V."
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{
"number": "6",
"name": "REFIO_B",
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"description": "Reference voltage input/output for channel B, part of the programmable buffered 2.5-V internal reference; the voltage range relative to REFGND_B is -0.3 V to AVDD + 0.3 V."
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{
"number": "7",
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{
"number": "9",
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"description": "Digital I/O supply, recommended 3.3 V; the absolute-maximum rating for DVDD to GND is -0.3 V to 6 V."
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{
"number": "11",
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"description": "Active-low chip-select signal; a CS rising edge ends the frame and places the serial bus in 3-state, and the digital input voltage range is -0.3 V to DVDD + 0.3 V with respect to GND."
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{
"number": "12",
"name": "SCLK",
"type": "input",
"description": "Clock for serial communication; the digital input voltage range with respect to GND is -0.3 V to DVDD + 0.3 V."
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{
"number": "13",
"name": "SDO_A",
"type": "output",
"description": "Data output for serial communication carrying the channel A conversion result, and both channel A and channel B results in 32-CLK single-SDO mode; it is in 3-state when CS is high."
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"number": "14",
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{
"number": "16",
"name": "AVDD",
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"extractor flagged: Package match confirmed: the ADS7253IPWR orderable part is TSSOP (PW), 16 pins, 2000-piece large T&R; Pin types are my mapping to KiCad ERC classes, not printed in the datasheet. The datasheet only labe; SDO_B is listed on page 4 of the pin table; the SDO_B 3-state/no-connect behavior comes from the ser"
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"name": "Integral nonlinearity (INL)",
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"name": "Input offset error",
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"name": "Input offset error match ADC_A to ADC_B",
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{
"name": "Input offset thermal drift",
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"kind": "electrical",
"unit": "µV/°C",
"min": -1,
"typ": null,
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{
"name": "Gain error",
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"kind": "electrical",
"unit": "%FS",
"min": -0.2,
"typ": 0.05,
"max": 0.2,
"conditions": "Referenced to the voltage at REFIO_x",
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{
"name": "Gain error match ADC_A to ADC_B",
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"name": "Gain error thermal drift",
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"name": "Signal-to-noise + distortion (SINAD)",
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{
"name": "Signal-to-noise ratio (SNR)",
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"min": 71.5,
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"conditions": "VREF = 2.5 V, VREF input range",
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"name": "Full-scale input range, single-ended, VREF range",
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"conditions": "Single-ended input, AINM_x = GND; upper limit printed as VREF",
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"name": "Full-scale input range, single-ended, 2 × VREF range",
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{
"name": "Absolute input voltage (AINM_x to REFGND), single-ended",
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"name": "Internal reference output voltage",
"symbol": "VREFOUT",
"kind": "electrical",
"unit": "V",
"min": 2.495,
"typ": 2.5,
"max": 2.505,
"conditions": "REFDAC_x = 1FFh (default), at 25°C",
"source_page": 9,
"source": "datasheet"
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"name": "VREF_A to VREF_B matching",
"symbol": "VREF-match",
"kind": "electrical",
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"min": -1,
"typ": null,
"max": 1,
"conditions": "REFDAC_x = 1FFh (default), at 25°C",
"source_page": 9,
"source": "datasheet"
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{
"name": "Reference voltage temperature drift",
"symbol": "dVREFOUT/dT",
"kind": "electrical",
"unit": "ppm/°C",
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"typ": null,
"max": 10,
"conditions": "REFDAC_x = 1FFh (default)",
"source_page": 9,
"source": "datasheet"
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{
"name": "Reference voltage (input), VREF range",
"symbol": "VREF",
"kind": "electrical",
"unit": "V",
"min": 2.4,
"typ": 2.5,
"max": null,
"conditions": "VREF range; upper limit printed as AVDD",
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{
"name": "Reference voltage (input), 2 × VREF range",
"symbol": "VREF",
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"min": 2.4,
"typ": 2.5,
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"conditions": "2 × VREF range; upper limit printed as AVDD / 2",
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},
{
"name": "DC leakage current (reference input)",
"symbol": "Ilkg(dc)",
"kind": "electrical",
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"min": -0.1,
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"max": 0.1,
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{
"name": "Digital input low-level voltage",
"symbol": "VIL",
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"min": -0.3,
"typ": null,
"max": null,
"conditions": "DVDD > 2.3 V; upper limit printed as 0.3 DVDD",
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"name": "Digital input current",
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"name": "Low-level output voltage",
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"conditions": "IOH = 500-µA sink (as printed); upper limit printed as 0.2 DVDD",
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"name": "Analog supply voltage AVDD, internal reference",
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"name": "Analog supply voltage AVDD, external reference",
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"name": "Analog supply voltage AVDD, external reference",
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"name": "Analog supply voltage AVDD, 2 × VREF range, external reference",
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"name": "Digital supply voltage",
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