ADS4145IRGZT

{
  "slug": "ads4145irgzt",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Analog To Digital Converters (ADC), VQFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
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    "data acquisition",
    "ads4145irgzt",
    "factory-2.0.0",
    "extractor-text"
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  "component": {
    "mpn": "ADS4145IRGZT",
    "manufacturer": "Texas Instruments",
    "package": "VQFN-48-EP(7x7)",
    "pin_count": 49,
    "category": "Data Acquisition",
    "subcategory": "Analog To Digital Converters (ADC)",
    "datasheet": "https://www.ti.com/cn/lit/gpn/ads4142",
    "parts": {
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      "lbr": "ads4145irgzt.lbr"
    },
    "distributor_links": {
      "lcsc": "C2670012",
      "digikey": "296-28385-2-ND",
      "mouser": "595-ADS4145IRGZT"
    },
    "distributor_check": {
      "checked_at": "2026-10-08T22:57:35Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "296-28385-2-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "595-ADS4145IRGZT",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "DRGND",
        "type": "power_in",
        "description": "Digital and output buffer ground; the exposed thermal pad is also connected to DRGND."
      },
      {
        "number": "2",
        "name": "DRVDD",
        "type": "power_in",
        "description": "1.8-V digital and output buffer supply (1.7 V to 1.9 V recommended)."
      },
      {
        "number": "3",
        "name": "OVR_SDOUT",
        "type": "output",
        "description": "Out-of-range indicator after reset when READOUT = 0; serial register readout output when READOUT = 1."
      },
      {
        "number": "4",
        "name": "CLKOUTM",
        "type": "output",
        "description": "Differential output clock, complement (LVDS mode)."
      },
      {
        "number": "5",
        "name": "CLKOUTP",
        "type": "output",
        "description": "Differential output clock, true (LVDS mode)."
      },
      {
        "number": "6",
        "name": "DFS",
        "type": "input",
        "description": "Analog 4-level data format select pin that sets twos complement or offset binary data and the DDR LVDS or parallel CMOS output interface (see Table 5); set by a resistor divider with 10% tolerance resistors."
      },
      {
        "number": "7",
        "name": "OE",
        "type": "input",
        "description": "Output buffer enable, active high; 0 V disables output data buffers and AVDD enables them; internal 180-kΩ pullup to DRVDD."
      },
      {
        "number": "8",
        "name": "AVDD",
        "type": "power_in",
        "description": "1.8-V analog power supply (1.7 V to 1.9 V recommended)."
      },
      {
        "number": "9",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground."
      },
      {
        "number": "10",
        "name": "CLKP",
        "type": "input",
        "description": "Differential clock input, true; sine-wave clock amplitude 0.2 V to 1.5 V, ac-coupled."
      },
      {
        "number": "11",
        "name": "CLKM",
        "type": "input",
        "description": "Differential clock input, complement; used with CLKP as the differential sample clock pair."
      },
      {
        "number": "12",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground."
      },
      {
        "number": "13",
        "name": "VCM",
        "type": "output",
        "description": "Outputs the 0.95-V common-mode voltage that can be used externally to bias the analog input pins."
      },
      {
        "number": "14",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground."
      },
      {
        "number": "15",
        "name": "INP",
        "type": "input",
        "description": "Differential analog input, positive; 2 VPP differential full-scale input with common-mode of VCM ±0.05 V."
      },
      {
        "number": "16",
        "name": "INM",
        "type": "input",
        "description": "Differential analog input, negative; 2 VPP differential full-scale input with common-mode of VCM ±0.05 V."
      },
      {
        "number": "17",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground."
      },
      {
        "number": "18",
        "name": "AVDD",
        "type": "power_in",
        "description": "1.8-V analog power supply (1.7 V to 1.9 V recommended)."
      },
      {
        "number": "19",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground."
      },
      {
        "number": "20",
        "name": "AVDD",
        "type": "power_in",
        "description": "1.8-V analog power supply (1.7 V to 1.9 V recommended)."
      },
      {
        "number": "21",
        "name": "NC",
        "type": "unconnected",
        "description": "Do not connect."
      },
      {
        "number": "22",
        "name": "AVDD",
        "type": "power_in",
        "description": "1.8-V analog power supply (1.7 V to 1.9 V recommended)."
      },
      {
        "number": "23",
        "name": "RESERVED",
        "type": "input",
        "description": "Digital control pin reserved for future use."
      },
      {
        "number": "24",
        "name": "AVDD",
        "type": "power_in",
        "description": "1.8-V analog power supply (1.7 V to 1.9 V recommended)."
      },
      {
        "number": "25",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground."
      },
      {
        "number": "26",
        "name": "AVDD",
        "type": "power_in",
        "description": "1.8-V analog power supply (1.7 V to 1.9 V recommended)."
      },
      {
        "number": "27",
        "name": "SEN",
        "type": "input",
        "description": "Serial interface enable when RESET is low; must be tied to AVDD when RESET is high (then usable as analog control); internal 180-kΩ pullup to AVDD."
      },
      {
        "number": "28",
        "name": "SDATA",
        "type": "input",
        "description": "Serial interface data input when RESET is low; STANDBY control when RESET is high (logic high enters standby); internal 180-kΩ pulldown."
      },
      {
        "number": "29",
        "name": "SCLK",
        "type": "input",
        "description": "Serial interface clock input when RESET is low; must be tied to ground when RESET is high; internal 180-kΩ pulldown."
      },
      {
        "number": "30",
        "name": "RESET",
        "type": "input",
        "description": "Serial interface reset input; a high pulse longer than 10 ns resets registers to default; tie high to use the parallel control pins; internal 180-kΩ pulldown."
      },
      {
        "number": "31",
        "name": "NC",
        "type": "unconnected",
        "description": "Do not connect."
      },
      {
        "number": "32",
        "name": "NC",
        "type": "unconnected",
        "description": "Do not connect."
      },
      {
        "number": "33",
        "name": "D0_D1_M",
        "type": "output",
        "description": "Differential output data D0 and D1 multiplexed, complement (DDR LVDS)."
      },
      {
        "number": "34",
        "name": "D0_D1_P",
        "type": "output",
        "description": "Differential output data D0 and D1 multiplexed, true (DDR LVDS)."
      },
      {
        "number": "35",
        "name": "DRVDD",
        "type": "power_in",
        "description": "1.8-V digital and output buffer supply (1.7 V to 1.9 V recommended)."
      },
      {
        "number": "36",
        "name": "DRGND",
        "type": "power_in",
        "description": "Digital and output buffer ground."
      },
      {
        "number": "37",
        "name": "D2_D3_M",
        "type": "output",
        "description": "Differential output data D2 and D3 multiplexed, complement (DDR LVDS)."
      },
      {
        "number": "38",
        "name": "D2_D3_P",
        "type": "output",
        "description": "Differential output data D2 and D3 multiplexed, true (DDR LVDS)."
      },
      {
        "number": "39",
        "name": "D4_D5_M",
        "type": "output",
        "description": "Differential output data D4 and D5 multiplexed, complement (DDR LVDS)."
      },
      {
        "number": "40",
        "name": "D4_D5_P",
        "type": "output",
        "description": "Differential output data D4 and D5 multiplexed, true (DDR LVDS)."
      },
      {
        "number": "41",
        "name": "D6_D7_M",
        "type": "output",
        "description": "Differential output data D6 and D7 multiplexed, complement (DDR LVDS)."
      },
      {
        "number": "42",
        "name": "D6_D7_P",
        "type": "output",
        "description": "Differential output data D6 and D7 multiplexed, true (DDR LVDS)."
      },
      {
        "number": "43",
        "name": "D8_D9_M",
        "type": "output",
        "description": "Differential output data D8 and D9 multiplexed, complement (DDR LVDS)."
      },
      {
        "number": "44",
        "name": "D8_D9_P",
        "type": "output",
        "description": "Differential output data D8 and D9 multiplexed, true (DDR LVDS)."
      },
      {
        "number": "45",
        "name": "D10_D11_M",
        "type": "output",
        "description": "Differential output data D10 and D11 multiplexed, complement (DDR LVDS)."
      },
      {
        "number": "46",
        "name": "D10_D11_P",
        "type": "output",
        "description": "Differential output data D10 and D11 multiplexed, true (DDR LVDS)."
      },
      {
        "number": "47",
        "name": "D12_D13_M",
        "type": "output",
        "description": "Differential output data D12 and D13 multiplexed, complement (DDR LVDS); 14-bit device pin."
      },
      {
        "number": "48",
        "name": "D12_D13_P",
        "type": "output",
        "description": "Differential output data D12 and D13 multiplexed, true (DDR LVDS); 14-bit device pin."
      },
      {
        "number": "49",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The MPN ADS4145IRGZT is the RGZ (VQFN-48, 7x7 mm with exposed thermal pad) small tape-and-reel varia; The datasheet gives two pin assignments on the same package: LVDS mode (shown above) and parallel CM; The exposed thermal pad (PAD) is not a numbered pin. It is connected to DRGND per the datasheet, and",
          "exposed pad 49 added from the footprint"
        ],
        "pages_sent": 19,
        "cost_usd": 0.1511,
        "at": "2026-10-08T22:56:44"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/ads4142",
        "pages": 87,
        "sha256": "e1046b38c80e73e5",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 49,
        "described": 49,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
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        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
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        "footprint_binding": "identity",
        "sha256": "f2b38b0b4bf967c77e683e8d4599608b9f0503055ec535b93c4ebb5d0163e916",
        "checked": "2026-10-08",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ads4145irgzt-etched.step",
        "role": "eda",
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        "sha256": "1bf02f8eab71700aa3f9fc303f41af589290eac36f2bda8dc6cdd087226262a4",
        "checked": "2026-10-08",
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  }
}