ADS127L21IRUKR

{
  "slug": "ads127l21irukr",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Global Sourcing Parts, WQFN-20-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "global sourcing parts",
    "ads127l21irukr",
    "factory-2.0.0",
    "extractor-text"
  ],
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    "ads127l21irukr.step",
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  "component": {
    "mpn": "ADS127L21IRUKR",
    "manufacturer": "Texas Instruments",
    "package": "WQFN-20-EP(3x3)",
    "pin_count": 21,
    "category": "Global Sourcing Parts",
    "subcategory": "Global Sourcing Parts",
    "datasheet": "https://www.ti.com.cn/cn/lit/ds/symlink/ads127l21.pdf?ts=1733970251936&ref_url=https%253A%252F%252Fwww.ti.com.cn%252Fsitesearch%252Fzh-cn%252Fdocs%252Funiversalsearch.tsp%253FlangPref%253Dzh-CN%2526nr%253D8%2526searchTerm%253DADS127L21IRUKR",
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      "lbr": "ads127l21irukr.lbr"
    },
    "distributor_links": {
      "lcsc": "C20606868",
      "digikey": "296-ADS127L21IRUKRTR-ND",
      "mouser": "595-ADS127L21IRUKR"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T06:15:30Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "296-ADS127L21IRUKRTR-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "595-ADS127L21IRUKR",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "AINP",
        "type": "input",
        "description": "Positive differential analog input; the input is defined as VIN = VAINP - VAINN, with the common mode centred at (AVDD1 + AVSS)/2 for best performance."
      },
      {
        "number": "2",
        "name": "AINN",
        "type": "input",
        "description": "Negative differential analog input; it can be tied to AVSS, ground or mid-supply for single-ended operation, which limits the input swing to the AINP range."
      },
      {
        "number": "3",
        "name": "VCM",
        "type": "output",
        "description": "Common-mode voltage output at (AVDD1 + AVSS)/2 that biases the common-mode control input of an external fully differential amplifier; rated 10 mA short-circuit limit and 100 nF maximum capacitive load on page 13, and it can be left unconnected if unused."
      },
      {
        "number": "4",
        "name": "REFP",
        "type": "input",
        "description": "Positive differential reference input; VREF = VREFP - VREFN, and the reference pins must not go more than 0.3 V below AVSS or 0.3 V above AVDD1."
      },
      {
        "number": "5",
        "name": "REFN",
        "type": "input",
        "description": "Negative differential reference input; it must stay within AVSS - 0.05 V to the recommended limits, and it is typically tied to ground in many applications."
      },
      {
        "number": "6",
        "name": "RESET",
        "type": "input",
        "description": "Active-low reset input with an internal 20 kΩ pull-up and a Schmitt-trigger input; pulling it low and then high resets the ADC."
      },
      {
        "number": "7",
        "name": "CS",
        "type": "input",
        "description": "Active-low chip select that starts and ends an SPI frame; tying it low selects 3-wire SPI operation."
      },
      {
        "number": "8",
        "name": "SDI",
        "type": "input",
        "description": "Serial data input to the device, latched on the falling edge of SCLK."
      },
      {
        "number": "9",
        "name": "SCLK",
        "type": "input",
        "description": "Serial data clock input (Schmitt-trigger) that shifts data in and out; output data updates on its rising edge and input data is latched on its falling edge."
      },
      {
        "number": "10",
        "name": "SDO/DRDY",
        "type": "output",
        "description": "Dual-function serial data output and data-ready output that can be programmed for data-only or combined data/data-ready operation; it is high impedance when CS is high."
      },
      {
        "number": "11",
        "name": "DRDY",
        "type": "output",
        "description": "Active-low data-ready output that goes low when new conversion data is available and is driven high again during data readback."
      },
      {
        "number": "12",
        "name": "CLK",
        "type": "input",
        "description": "Clock input for external-clock operation, with frequency limits of 0.5 MHz to 32.768 MHz depending on speed mode (recommended operating conditions, page 5)."
      },
      {
        "number": "13",
        "name": "IOVDD",
        "type": "power_in",
        "description": "Digital I/O supply, referenced to DGND, rated 1.65 V to 5.5 V; it also feeds the internal digital regulator (regulated to 1.35 V at CAPD)."
      },
      {
        "number": "14",
        "name": "DGND",
        "type": "power_in",
        "description": "Digital ground reference for IOVDD and the digital pins."
      },
      {
        "number": "15",
        "name": "CAPD",
        "type": "passive",
        "description": "Digital regulator output (1.35 V typical, referenced to DGND) that must be bypassed with a 1 µF capacitor to DGND and is not intended to drive external loads."
      },
      {
        "number": "16",
        "name": "START",
        "type": "input",
        "description": "Conversion start input that synchronises the digital filter and controls conversions depending on the selected start mode."
      },
      {
        "number": "17",
        "name": "AVSS",
        "type": "power_in",
        "description": "Negative analog supply; in unipolar operation it is tied to DGND (0 V), and in bipolar operation it is set to a negative supply (for example -2.5 V), with AVSS to DGND limited to -2.75 V to 0 V."
      },
      {
        "number": "18",
        "name": "CAPA",
        "type": "passive",
        "description": "Analog regulator output (1.6 V referenced to AVSS) that must be bypassed with a 1 µF capacitor to AVSS and is not intended to drive external loads."
      },
      {
        "number": "19",
        "name": "AVDD2",
        "type": "power_in",
        "description": "Positive analog supply referenced to AVSS that powers the modulator core, rated 1.74 V to 5.5 V (recommended operating conditions, page 5)."
      },
      {
        "number": "20",
        "name": "AVDD1",
        "type": "power_in",
        "description": "Positive analog supply that powers the input and reference precharge buffers and sampling switches; the supply range is 2.85 V to 5.5 V depending on speed mode, with AVDD1 to DGND at 1.65 V minimum."
      },
      {
        "number": "21",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The datasheet prints the thermal pad with no number ('Pad'), so it is reported as 'Pad'. Its ERC typ; CAPD and CAPA are typed as 'passive' because the datasheet only labels them as analog outputs (regul; VCM is typed as 'output'. Its limits (10 mA short-circuit, 100 nF load) are on page 13, not on the p",
          "exposed pad 21 added from the footprint",
          "dropped thermal pad ['EP'] absent from footprint"
        ],
        "pages_sent": 70,
        "cost_usd": 0.3513,
        "at": "2026-10-18T06:11:14"
      },
      "datasheet": {
        "url": "https://www.ti.com.cn/cn/lit/ds/symlink/ads127l21.pdf?ts=1733970251936&ref_url=https%253A%252F%252Fwww.ti.com.cn%252Fsitesearch%252Fzh-cn%252Fdocs%252Funiversalsearch.tsp%253FlangPref%253Dzh-CN%2526nr%253D8%2526searchTerm%253DADS127L21IRUKR",
        "pages": 121,
        "sha256": "95dc8cc6df030081",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 21,
        "described": 21,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
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        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
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        "sha256": "b3b119456bb9388f70bb82d3ef42d1ea2c75efdb038bbeeb904546a823e1ed2e",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
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  }
}