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Initial commit: component/ads1252u

Ray ·dfd96b627b ·1mo ago
2 files changed +200
README.mdadded+44
@@ -0,0 +1,44 @@+# ADS1252U++**Texas Instruments** · Analog To Digital Converters (ADC) · SOIC-8++ADS1252U from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | +VIN | input | Positive input of the differential analog input pair, rated ±100 mA momentary / ±10 mA continuous, voltage range GND - 0.3 V to VDD + 0.3 V. |+| 2 | -VIN | input | Negative input of the differential analog input pair, rated ±100 mA momentary / ±10 mA continuous, voltage range GND - 0.3 V to VDD + 0.3 V. |+| 3 | +VDD | power_in | Single +5 V power supply input, operating range +4.75 V to +5.25 V, quiescent current 8-10 mA. |+| 4 | CLK | input | Device system clock input, CMOS-compatible Schmitt-trigger input, maximum 16 MHz. |+| 5 | DOUT/DRDY | output | Serial data output / data-ready indicator; logic LOW indicates new output word available from data output register, data shifts out on rising edge of SCLK. |+| 6 | SCLK | input | Serial clock input, CMOS-compatible Schmitt-trigger, independent of CLK, maximum 16 MHz; holding HIGH initiates modulator reset for converter synchronization or power-down mode. |+| 7 | GND | power_in | Ground / signal reference, must connect to analog ground plane per layout guidelines. |+| 8 | VREF | power_in | Reference voltage input, range 0.5 V to VDD, typical 4.096 V, average load current 220 µA at 16 MHz system clock. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-8 |+| Category | Data Acquisition |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `ADS1252U`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)+- 3D model files: `ads1252u-etched.step` / `ads1252u-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ads1252u.step` / `ads1252u.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/ads1252) (25 pp, sha256 `df5875bf4636e6e4`, retrieved 2026-09-26, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ads1252u-datasheet.pdf)
page.jsonadded+156
@@ -0,0 +1,156 @@+{+  "slug": "ads1252u",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Analog To Digital Converters (ADC), SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "data acquisition",+    "ads1252u",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "ads1252u.kicad_sym",+    "ads1252u.kicad_mod",+    "ads1252u.glb",+    "ads1252u.step",+    "ads1252u.lbr",+    "docs/hero.png",+    "docs/ads1252u-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "ADS1252U",+    "manufacturer": "Texas Instruments",+    "package": "SOIC-8",+    "pin_count": 8,+    "category": "Data Acquisition",+    "subcategory": "Analog To Digital Converters (ADC)",+    "datasheet": "https://www.ti.com/cn/lit/gpn/ads1252",+    "parts": {+      "symbol": "ads1252u.kicad_sym",+      "footprint": "ads1252u.kicad_mod",+      "model_3d": "ads1252u-etched.glb",+      "model_3d_plain": "ads1252u.glb",+      "model_3d_step": "ads1252u-etched.step",+      "model_3d_step_plain": "ads1252u.step",+      "lbr": "ads1252u.lbr"+    },+    "distributor_links": {+      "lcsc": "C70912",+      "digikey": "ADS1252U-ND",+      "mouser": "595-ADS1252U"+    },+    "distributor_check": {+      "checked_at": "2026-09-26T12:41:28Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "ADS1252U-ND",+        "status": "found",+        "lifecycle": "Active"+      },+      "mouser": {+        "pn": "595-ADS1252U",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "+VIN",+        "type": "input",+        "description": "Positive input of the differential analog input pair, rated ±100 mA momentary / ±10 mA continuous, voltage range GND - 0.3 V to VDD + 0.3 V."+      },+      {+        "number": "2",+        "name": "–VIN",+        "type": "input",+        "description": "Negative input of the differential analog input pair, rated ±100 mA momentary / ±10 mA continuous, voltage range GND - 0.3 V to VDD + 0.3 V."+      },+      {+        "number": "3",+        "name": "+VDD",+        "type": "power_in",+        "description": "Single +5 V power supply input, operating range +4.75 V to +5.25 V, quiescent current 8-10 mA."+      },+      {+        "number": "4",+        "name": "CLK",+        "type": "input",+        "description": "Device system clock input, CMOS-compatible Schmitt-trigger input, maximum 16 MHz."+      },+      {+        "number": "5",+        "name": "DOUT/DRDY",+        "type": "output",+        "description": "Serial data output / data-ready indicator; logic LOW indicates new output word available from data output register, data shifts out on rising edge of SCLK."+      },+      {+        "number": "6",+        "name": "SCLK",+        "type": "input",+        "description": "Serial clock input, CMOS-compatible Schmitt-trigger, independent of CLK, maximum 16 MHz; holding HIGH initiates modulator reset for converter synchronization or power-down mode."+      },+      {+        "number": "7",+        "name": "GND",+        "type": "power_in",+        "description": "Ground / signal reference, must connect to analog ground plane per layout guidelines."+      },+      {+        "number": "8",+        "name": "VREF",+        "type": "power_in",+        "description": "Reference voltage input, range 0.5 V to VDD, typical 4.096 V, average load current 220 µA at 16 MHz system clock."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.2",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.2",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-4-6",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [],+        "pages_sent": 25,+        "cost_usd": 0.1862,+        "at": "2026-09-26T12:41:12"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/ads1252",+        "pages": 25,+        "sha256": "df5875bf4636e6e4",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 8,+        "described": 8,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file