# ADS1230IPWR

**Texas Instruments** · Analog To Digital Converters (ADC) · TSSOP-16

ADS1230IPWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DVDD | power_in | Digital power supply, 2.7V to 5.3V |
| 2 | DGND | power_in | Digital ground reference |
| 3 | CLKIN | input | External clock input, typically 4.9152MHz with allowable frequency range 0.2 to 6 MHz; tie low to activate internal oscillator |
| 4 | GAIN | input | PGA gain select input: 0 selects gain of 64, 1 selects gain of 128 |
| 5 | CAP | passive | Gain amplifier bypass capacitor connection with internal 2kΩ resistor; use 0.1µF external capacitor for 720Hz low-pass filter corner frequency |
| 6 | CAP | passive | Gain amplifier bypass capacitor connection with internal 2kΩ resistor; use 0.1µF external capacitor for 720Hz low-pass filter corner frequency |
| 7 | AINP | input | Positive analog input for differential measurement; full-scale input range ±39mV at gain 64 or ±19.5mV at gain 128; protected with internal ESD diodes |
| 8 | AINN | input | Negative analog input for differential measurement; full-scale input range ±39mV at gain 64 or ±19.5mV at gain 128; protected with internal ESD diodes |
| 9 | REFN | input | Negative reference input; REFN must be within AGND - 0.1V to REFP - 1.5V, protected with internal ESD diodes |
| 10 | REFP | input | Positive reference input; REFP must be within REFN + 1.5V to AVDD + 0.1V, protected with internal ESD diodes |
| 11 | AGND | power_in | Analog ground reference |
| 12 | AVDD | power_in | Analog power supply, 2.7V to 5.3V |
| 13 | SPEED | input | Data rate select input: 0 selects 10SPS data rate with simultaneous 50Hz and 60Hz rejection, 1 selects 80SPS data rate |
| 14 | PDWN | input | Power-down input; holding this pin low powers down entire converter and resets ADC circuitry; must remain low for minimum 26µs pulse width |
| 15 | SCLK | input | Serial clock input; data clocked out on rising edge at maximum frequency 5MHz; also initiates offset calibration and standby modes; includes built-in hysteresis |
| 16 | DRDY/DOUT | output | Dual-purpose output: indicates valid data by going low, then outputs 20-bit conversion data MSB first on subsequent SCLK rising edges |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-16 |
| Category | Data Acquisition |
| Pins | 16 |

## CAD (KiCad official)

- Symbol: `ADS1230IPWR`
- Footprint: `Package_SO:TSSOP-16_4.4x5mm_P0.65mm`
- 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files: `ads1230ipwr-etched.step` / `ads1230ipwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ads1230ipwr.step` / `ads1230ipwr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](http://www.ti.com/cn/lit/gpn/ads1230) (31 pp, sha256 `0f57e6ad7aafe806`, retrieved 2026-09-21, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ads1230ipwr-datasheet.pdf)