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Initial commit: component/ads1230ipwr

Ray ·90956cfa85 ·1mo ago
2 files changed +241
README.mdadded+52
@@ -0,0 +1,52 @@+# ADS1230IPWR++**Texas Instruments** · Analog To Digital Converters (ADC) · TSSOP-16++ADS1230IPWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | DVDD | power_in | Digital power supply, 2.7V to 5.3V |+| 2 | DGND | power_in | Digital ground reference |+| 3 | CLKIN | input | External clock input, typically 4.9152MHz with allowable frequency range 0.2 to 6 MHz; tie low to activate internal oscillator |+| 4 | GAIN | input | PGA gain select input: 0 selects gain of 64, 1 selects gain of 128 |+| 5 | CAP | passive | Gain amplifier bypass capacitor connection with internal 2kΩ resistor; use 0.1µF external capacitor for 720Hz low-pass filter corner frequency |+| 6 | CAP | passive | Gain amplifier bypass capacitor connection with internal 2kΩ resistor; use 0.1µF external capacitor for 720Hz low-pass filter corner frequency |+| 7 | AINP | input | Positive analog input for differential measurement; full-scale input range ±39mV at gain 64 or ±19.5mV at gain 128; protected with internal ESD diodes |+| 8 | AINN | input | Negative analog input for differential measurement; full-scale input range ±39mV at gain 64 or ±19.5mV at gain 128; protected with internal ESD diodes |+| 9 | REFN | input | Negative reference input; REFN must be within AGND - 0.1V to REFP - 1.5V, protected with internal ESD diodes |+| 10 | REFP | input | Positive reference input; REFP must be within REFN + 1.5V to AVDD + 0.1V, protected with internal ESD diodes |+| 11 | AGND | power_in | Analog ground reference |+| 12 | AVDD | power_in | Analog power supply, 2.7V to 5.3V |+| 13 | SPEED | input | Data rate select input: 0 selects 10SPS data rate with simultaneous 50Hz and 60Hz rejection, 1 selects 80SPS data rate |+| 14 | PDWN | input | Power-down input; holding this pin low powers down entire converter and resets ADC circuitry; must remain low for minimum 26µs pulse width |+| 15 | SCLK | input | Serial clock input; data clocked out on rising edge at maximum frequency 5MHz; also initiates offset calibration and standby modes; includes built-in hysteresis |+| 16 | DRDY/DOUT | output | Dual-purpose output: indicates valid data by going low, then outputs 20-bit conversion data MSB first on subsequent SCLK rising edges |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | TSSOP-16 |+| Category | Data Acquisition |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `ADS1230IPWR`+- Footprint: `Package_SO:TSSOP-16_4.4x5mm_P0.65mm`+- 3D model: TSSOP-16 (KiCad packages3D, STEP)+- 3D model files: `ads1230ipwr-etched.step` / `ads1230ipwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ads1230ipwr.step` / `ads1230ipwr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](http://www.ti.com/cn/lit/gpn/ads1230) (31 pp, sha256 `0f57e6ad7aafe806`, retrieved 2026-09-21, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ads1230ipwr-datasheet.pdf)
page.jsonadded+189
@@ -0,0 +1,189 @@+{+  "slug": "ads1230ipwr",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Analog To Digital Converters (ADC), TSSOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "data acquisition",+    "ads1230ipwr",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "ads1230ipwr.kicad_sym",+    "ads1230ipwr.kicad_mod",+    "ads1230ipwr.glb",+    "ads1230ipwr.step",+    "ads1230ipwr.lbr",+    "docs/hero.png",+    "docs/ads1230ipwr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "ADS1230IPWR",+    "manufacturer": "Texas Instruments",+    "package": "TSSOP-16",+    "pin_count": 16,+    "category": "Data Acquisition",+    "subcategory": "Analog To Digital Converters (ADC)",+    "datasheet": "http://www.ti.com/cn/lit/gpn/ads1230",+    "parts": {+      "symbol": "ads1230ipwr.kicad_sym",+      "footprint": "ads1230ipwr.kicad_mod",+      "model_3d": "ads1230ipwr-etched.glb",+      "model_3d_plain": "ads1230ipwr.glb",+      "model_3d_step": "ads1230ipwr-etched.step",+      "model_3d_step_plain": "ads1230ipwr.step",+      "lbr": "ads1230ipwr.lbr"+    },+    "distributor_links": {+      "lcsc": "C58052"+    },+    "pins": [+      {+        "number": "1",+        "name": "DVDD",+        "type": "power_in",+        "description": "Digital power supply, 2.7V to 5.3V"+      },+      {+        "number": "2",+        "name": "DGND",+        "type": "power_in",+        "description": "Digital ground reference"+      },+      {+        "number": "3",+        "name": "CLKIN",+        "type": "input",+        "description": "External clock input, typically 4.9152MHz with allowable frequency range 0.2 to 6 MHz; tie low to activate internal oscillator"+      },+      {+        "number": "4",+        "name": "GAIN",+        "type": "input",+        "description": "PGA gain select input: 0 selects gain of 64, 1 selects gain of 128"+      },+      {+        "number": "5",+        "name": "CAP",+        "type": "passive",+        "description": "Gain amplifier bypass capacitor connection with internal 2kΩ resistor; use 0.1µF external capacitor for 720Hz low-pass filter corner frequency"+      },+      {+        "number": "6",+        "name": "CAP",+        "type": "passive",+        "description": "Gain amplifier bypass capacitor connection with internal 2kΩ resistor; use 0.1µF external capacitor for 720Hz low-pass filter corner frequency"+      },+      {+        "number": "7",+        "name": "AINP",+        "type": "input",+        "description": "Positive analog input for differential measurement; full-scale input range ±39mV at gain 64 or ±19.5mV at gain 128; protected with internal ESD diodes"+      },+      {+        "number": "8",+        "name": "AINN",+        "type": "input",+        "description": "Negative analog input for differential measurement; full-scale input range ±39mV at gain 64 or ±19.5mV at gain 128; protected with internal ESD diodes"+      },+      {+        "number": "9",+        "name": "REFN",+        "type": "input",+        "description": "Negative reference input; REFN must be within AGND - 0.1V to REFP - 1.5V, protected with internal ESD diodes"+      },+      {+        "number": "10",+        "name": "REFP",+        "type": "input",+        "description": "Positive reference input; REFP must be within REFN + 1.5V to AVDD + 0.1V, protected with internal ESD diodes"+      },+      {+        "number": "11",+        "name": "AGND",+        "type": "power_in",+        "description": "Analog ground reference"+      },+      {+        "number": "12",+        "name": "AVDD",+        "type": "power_in",+        "description": "Analog power supply, 2.7V to 5.3V"+      },+      {+        "number": "13",+        "name": "SPEED",+        "type": "input",+        "description": "Data rate select input: 0 selects 10SPS data rate with simultaneous 50Hz and 60Hz rejection, 1 selects 80SPS data rate"+      },+      {+        "number": "14",+        "name": "PDWN",+        "type": "input",+        "description": "Power-down input; holding this pin low powers down entire converter and resets ADC circuitry; must remain low for minimum 26µs pulse width"+      },+      {+        "number": "15",+        "name": "SCLK",+        "type": "input",+        "description": "Serial clock input; data clocked out on rising edge at maximum frequency 5MHz; also initiates offset calibration and standby modes; includes built-in hysteresis"+      },+      {+        "number": "16",+        "name": "DRDY/DOUT",+        "type": "output",+        "description": "Dual-purpose output: indicates valid data by going low, then outputs 20-bit conversion data MSB first on subsequent SCLK rising edges"+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.2",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.2",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-4-6",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [],+        "pages_sent": 31,+        "cost_usd": 0.2027,+        "at": "2026-09-21T15:20:11"+      },+      "datasheet": {+        "url": "http://www.ti.com/cn/lit/gpn/ads1230",+        "pages": 31,+        "sha256": "0f57e6ad7aafe806",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 16,+        "described": 16,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file