component
ADR4550BRZ
Public Made by Adomby adom
Analog Devices Voltage Reference, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownADR4550BRZ
Analog Devices · Voltage Reference · SOIC-8
ADR4550BRZ from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NIC | unconnected | Internal no-connect pin; it is not internally connected and is not a functional pin. |
| 2 | VIN | power_in | Input voltage connection; the datasheet specifies an operating supply range of 3 V to 15 V (5.1 V minimum for the ADR4550) and an absolute maximum of 16 V. |
| 3 | NIC | unconnected | Internal no-connect pin; it is not internally connected and is not a functional pin. |
| 4 | GND | power_in | Ground reference pin for the reference. |
| 5 | NIC | unconnected | Internal no-connect pin; it is not internally connected and is not a functional pin. |
| 6 | VOUT | power_out | Reference voltage output, 5.000 V nominal for the ADR4550, rated for +10 mA source and −10 mA sink current. |
| 7 | NIC | unconnected | Internal no-connect pin; it is not internally connected and is not a functional pin. |
| 8 | DNC | unconnected | Do not connect; this pin must be left unconnected. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Initial output voltage error (B grade), max | VOUT_ERR | -0.02 | 0.02 | % | B级 | 9 | |
| Initial output voltage error (B grade), equivalent value | VOUT_ERR | 1 | mV | B级 | 9 | ||
| Solder heat shift (3 x reflow) | -0.02 | 0.02 | % | 9 | |||
| Temperature coefficient, black box method (B grade) | TCVOUT | 2 | ppm/°C | −40°C ≤ TA ≤ +125°C（黑盒法） | 9 | ||
| Temperature coefficient, bow-tie method (B grade) | TCVOUT | 4 | ppm/°C | −40°C ≤ TA ≤ +125°C（领结法） | 9 | ||
| Line regulation | ΔVOUT/ΔVIN | 1 | 10 | ppm/V | −40°C ≤ TA ≤ +125°C | 9 | |
| Load regulation, source | ΔVOUT/ΔIL | 25 | 80 | ppm/mA | IL = 0 mA至+10 mA拉电流，−40°C ≤ TA ≤ +125°C | 9 | |
| Load regulation, sink | ΔVOUT/ΔIL | 35 | 120 | ppm/mA | IL = 0 mA至−10 mA灌电流，−40°C ≤ TA ≤ +125°C | 9 | |
| Quiescent current | IQ | 700 | 950 | μA | −40°C ≤ TA ≤ +125°C，空载 | 9 | |
| Dropout voltage, no load | VDO | 100 | mV | −40°C ≤ TA ≤ +125°C，空载 | 9 | ||
| Dropout voltage, IL = 2 mA | VDO | 300 | mV | −40°C ≤ TA ≤ +125°C，IL = 2 mA | 9 | ||
| Ripple rejection ratio | RRR | 90 | dB | fIN = 1 kHz | 9 | ||
| Output current capability, sink | IL | -10 | mA | 灌电流 | 9 | ||
| Output current capability, source | IL | 10 | mA | 拉电流 | 9 | ||
| Output voltage | VOUT | 5 | V | 9 | |||
| Output voltage noise | eNp-p | 2.8 | μV p-p | 0.1 Hz至10.0 Hz | 9 | ||
| Output voltage noise density | eN | 95.3 | nV/√Hz | 1 kHz | 9 | ||
| Thermal hysteresis, full cycle (+25°C to +125°C to −40°C to +25°C) | ΔVOUT_HYS | -13 | ppm | +25°C至+125°C至−40°C至+25°C（全循环） | 9 | ||
| Thermal hysteresis, half cycle (25°C to 125°C to 25°C) | ΔVOUT_HYS | -97 | ppm | 25°C至125°C至25°C（半循环） | 9 | ||
| Thermal hysteresis, full cycle (25°C to 70°C to 0°C to 25°C) | ΔVOUT_HYS | -8 | ppm | 25°C至70°C至0°C至25°C（全循环） | 9 | ||
| Thermal hysteresis, half cycle (25°C to 70°C to 25°C) | ΔVOUT_HYS | -17 | ppm | 25°C至70°C至25°C（半循环） | 9 | ||
| Long-term drift, early (250 hours) | ΔVOUT_LTD | 19 | ppm | TA = 25°C | 9 | ||
| Long-term drift, 1000 hours | ΔVOUT_LTD | 25 | ppm | TA = 25°C | 9 | ||
| Long-term drift, 4500 hours | ΔVOUT_LTD | 51 | ppm | TA = 25°C | 9 | ||
| Turn-on settling time | tR | 160 | µs | COUT = 0.1 µF，CIN = 0.1 µF，RLOAD = 1 kΩ | 9 | ||
| Load capacitance | 0.1 | 100 | µF | 9 | |||
| Input voltage (electrical table condition for ADR4550) | VIN | 5.1 | 15 | V | 除非另有说明，电源电压VIN = 5.1 V至15 V，IL = 0 mA，TA = 25°C | 9 | |
| Power supply voltage, absolute maximum | 16 | V | TA = 25°C | 10 | |||
| Operating temperature range | -40 | 125 | °C | 10 | |||
| Storage temperature range | -65 | 150 | °C | 10 | |||
| Junction temperature range | -65 | 150 | °C | 10 | |||
| ESD, human body model (HBM) | 6 | kV | 10 | ||||
| Thermal resistance, junction-to-ambient, 1-layer JEDEC board | θJA | 63 | °C/W | 1层JEDEC板 | 10 | ||
| Thermal resistance, junction-to-ambient, 2-layer JEDEC board | θJA | 120 | °C/W | 2层JEDEC板 | 10 |
CAD (KiCad official)
- Symbol:
ADR4550BRZ - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
adr4550brz-etched.step/adr4550brz-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);adr4550brz.step/adr4550brz.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (37 pp, sha256
512ab2dfe214da56, retrieved 2026-10-18, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).