component
ADP5071ACPZ-R7
Public Made by Adomby adom
Analog Devices DC-DC Converters, LFCSP-20(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "adp5071acpz-r7",
"version": "0.1.0",
"type": "component",
"description": "Analog Devices DC-DC Converters, LFCSP-20(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
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"power management (pmic)",
"adp5071acpz-r7",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
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"adp5071acpz-r7.step",
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"docs/hero.png",
"docs/adp5071acpz-r7-datasheet.pdf",
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],
"component": {
"mpn": "ADP5071ACPZ-R7",
"manufacturer": "Analog Devices",
"package": "LFCSP-20(4x4)",
"pin_count": 21,
"category": "Power Management (PMIC)",
"subcategory": "DC-DC Converters",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588904586980052992",
"parts": {
"symbol": "adp5071acpz-r7.kicad_sym",
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"model_3d_step_plain": "adp5071acpz-r7.step",
"lbr": "adp5071acpz-r7.lbr"
},
"distributor_links": {
"lcsc": "C481889"
},
"distributor_check": {
"checked_at": "2026-10-17T16:34:44Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": null,
"status": "quota"
},
"mouser": {
"pn": null,
"status": "quota"
}
},
"pins": [
{
"number": "1",
"name": "INBK",
"type": "output",
"description": "Input disconnect switch output for the boost regulator, with an on resistance of 210 mΩ (typ) per the specifications."
},
{
"number": "2",
"name": "SYNC/FREQ",
"type": "input",
"description": "Frequency setting and synchronization input: high sets 2.4 MHz, low sets 1.2 MHz, and an external clock from 1.0 MHz to 2.6 MHz can be connected to synchronize the switching frequency."
},
{
"number": "3",
"name": "SEQ",
"type": "input",
"description": "Start-up sequence control: leave open for manual enable, connect to VREG for simultaneous start-up, or pull low for sequenced start-up."
},
{
"number": "4",
"name": "SLEW",
"type": "input",
"description": "Driver stage slew rate control for SW1 and SW2: leave open for fastest slew, connect to VREG for normal slew, or connect to AGND for slowest slew."
},
{
"number": "5",
"name": "FB1",
"type": "input",
"description": "Boost regulator feedback input, where a resistor divider from the positive side of COUT1 to AGND programs VPOS; the overvoltage threshold at this pin is 0.86 V (typ)."
},
{
"number": "6",
"name": "COMP1",
"type": "passive",
"description": "Error amplifier compensation for the boost regulator, with the compensation network connected between this pin and AGND."
},
{
"number": "7",
"name": "EN1",
"type": "input",
"description": "Boost regulator precision enable, compared to an internal reference with a 1.15 V (typ) high-level threshold and a internal pull-down so the regulator is off when the pin floats."
},
{
"number": "8",
"name": "SS",
"type": "passive",
"description": "Soft-start programming: leave open for the fastest soft start, or connect a resistor to AGND to slow the soft start of both regulators."
},
{
"number": "9",
"name": "EN2",
"type": "input",
"description": "Inverting regulator precision enable, compared to an internal reference with a 1.15 V (typ) high-level threshold and an internal pull-down so the regulator is off when the pin floats."
},
{
"number": "10",
"name": "COMP2",
"type": "passive",
"description": "Error amplifier compensation for the inverting regulator, with the compensation network connected between this pin and AGND."
},
{
"number": "11",
"name": "FB2",
"type": "input",
"description": "Inverting regulator feedback input, where a resistor divider from the negative side of COUT2 to VREF programs VNEG."
},
{
"number": "12",
"name": "VREF",
"type": "power_out",
"description": "Inverting regulator reference output; connect a 1.0 µF ceramic filter capacitor between VREF and AGND."
},
{
"number": "13",
"name": "AGND",
"type": "power_in",
"description": "Analog ground; connect as near to the pin as possible between the CVREF and CVREG capacitors and to the exposed pad."
},
{
"number": "14",
"name": "VREG",
"type": "power_out",
"description": "Internal regulator output (4.25 V typ) that needs a 1.0 µF ceramic filter capacitor to AGND and must not be used to supply external circuitry."
},
{
"number": "15",
"name": "PVIN1",
"type": "power_in",
"description": "Power input for the boost regulator, with a supply range of 2.85 V to 15 V."
},
{
"number": "16",
"name": "PVINSYS",
"type": "power_in",
"description": "System power supply for the ADP5071, with UVLO rising threshold of 2.85 V (typ) and falling threshold of 2.55 V (typ)."
},
{
"number": "17",
"name": "PVIN2",
"type": "power_in",
"description": "Power input for the inverting regulator, with a supply range of 2.85 V to 15 V."
},
{
"number": "18",
"name": "SW2",
"type": "output",
"description": "Switching node for the inverting regulator, rated from PVIN2 − 40 V to PVIN2 + 0.3 V (absolute maximum)."
},
{
"number": "19",
"name": "PGND",
"type": "power_in",
"description": "Power ground for the boost and inverting regulators, to be kept separate from AGND on the top layer and not connected to the exposed pad on the top layer."
},
{
"number": "20",
"name": "SW1",
"type": "output",
"description": "Switching node for the boost regulator, rated from −0.3 V to +40 V (absolute maximum)."
},
{
"number": "21",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The pin-configuration figure text (Figure 2) is scrambled, so pin-to-name mapping was taken from Tab; The exposed pad is not a numbered pin. It is listed as EPAD, which is not one of the 1..20 numbers p; Pin types for SS, COMP1, and COMP2 are not stated in the datasheet; passive was assigned from their ",
"exposed pad 21 added from the footprint",
"dropped thermal pad ['EP'] absent from footprint"
],
"pages_sent": 12,
"cost_usd": 0.0894,
"at": "2026-10-17T16:32:22"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588904586980052992",
"pages": 27,
"sha256": "93df08fe153570f1",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 21,
"described": 21,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
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},
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"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
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"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
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"checked": "2026-10-17",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
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}