main
Ray Publish 0.1.0 0073765 16d ago
{
  "slug": "adp5052acpz-r7",
  "version": "0.1.0",
  "type": "component",
  "description": "Analog Devices DC-DC Converters, LFCSP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "power management (pmic)",
    "adp5052acpz-r7",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "adp5052acpz-r7.kicad_sym",
    "adp5052acpz-r7.kicad_mod",
    "adp5052acpz-r7.glb",
    "adp5052acpz-r7.step",
    "adp5052acpz-r7.lbr",
    "docs/hero.png",
    "docs/adp5052acpz-r7-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "adp5052acpz-r7-hero.glb",
    "adp5052acpz-r7-hero.overlay.json",
    "adp5052acpz-r7-etched.glb"
  ],
  "component": {
    "mpn": "ADP5052ACPZ-R7",
    "manufacturer": "Analog Devices",
    "package": "LFCSP-48(7x7)",
    "pin_count": 49,
    "category": "Power Management (PMIC)",
    "subcategory": "DC-DC Converters",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588918152915275777",
    "parts": {
      "symbol": "adp5052acpz-r7.kicad_sym",
      "footprint": "adp5052acpz-r7.kicad_mod",
      "model_3d": "adp5052acpz-r7-hero.glb",
      "model_3d_plain": "adp5052acpz-r7-etched.glb",
      "model_3d_step": "adp5052acpz-r7-etched.step",
      "model_3d_step_plain": "adp5052acpz-r7.step",
      "lbr": "adp5052acpz-r7.lbr"
    },
    "distributor_links": {
      "lcsc": "C459150",
      "digikey": "505-ADP5052ACPZ-R7TR-ND",
      "mouser": "584-ADP5052ACPZ-R7"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T02:49:21Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "505-ADP5052ACPZ-R7TR-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "584-ADP5052ACPZ-R7",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "BST3",
        "type": "power_out",
        "description": "Bootstrap supply for the channel 3 high-side FET driver, connected through a 0.1 µF X5R or X7R ceramic capacitor to SW3."
      },
      {
        "number": "2",
        "name": "PGND3",
        "type": "power_in",
        "description": "Power ground for channel 3."
      },
      {
        "number": "3",
        "name": "SW3",
        "type": "output",
        "description": "Channel 3 switch-node output."
      },
      {
        "number": "4",
        "name": "PVIN3",
        "type": "power_in",
        "description": "Channel 3 power input, bypassed to ground at this pin; the regulator input range is 4.5 V to 15 V."
      },
      {
        "number": "5",
        "name": "EN5",
        "type": "input",
        "description": "Channel 5 precision enable input with a 0.8 V threshold; an external resistor divider can set the start-up threshold."
      },
      {
        "number": "6",
        "name": "FB5",
        "type": "input",
        "description": "Channel 5 feedback sense input, with a 0.5 V reference for the adjustable output."
      },
      {
        "number": "7",
        "name": "VOUT5",
        "type": "power_out",
        "description": "Channel 5 output of the 200 mA LDO regulator."
      },
      {
        "number": "8",
        "name": "PVIN5",
        "type": "power_in",
        "description": "Channel 5 LDO power input, operating from 1.7 V to 5.5 V and bypassed to ground at this pin."
      },
      {
        "number": "9",
        "name": "PVIN4",
        "type": "power_in",
        "description": "Channel 4 power input, bypassed to ground at this pin; the regulator input range is 4.5 V to 15 V."
      },
      {
        "number": "10",
        "name": "SW4",
        "type": "output",
        "description": "Channel 4 switch-node output."
      },
      {
        "number": "11",
        "name": "PGND4",
        "type": "power_in",
        "description": "Power ground for channel 4."
      },
      {
        "number": "12",
        "name": "BST4",
        "type": "power_out",
        "description": "Bootstrap supply for the channel 4 high-side FET driver, connected through a 0.1 µF X5R or X7R ceramic capacitor to SW4."
      },
      {
        "number": "13",
        "name": "GND",
        "type": "power_in",
        "description": "For internal test only; connect this pin to ground."
      },
      {
        "number": "14",
        "name": "EN4",
        "type": "input",
        "description": "Channel 4 precision enable input with a 0.8 V threshold; an external resistor divider can set the start-up threshold."
      },
      {
        "number": "15",
        "name": "COMP4",
        "type": "passive",
        "description": "Channel 4 error-amplifier output; an RC network is connected from this pin to ground."
      },
      {
        "number": "16",
        "name": "FB4",
        "type": "input",
        "description": "Channel 4 feedback sense input."
      },
      {
        "number": "17",
        "name": "GND",
        "type": "power_in",
        "description": "For internal test only; connect this pin to ground."
      },
      {
        "number": "18",
        "name": "GND",
        "type": "power_in",
        "description": "For internal test only; connect this pin to ground."
      },
      {
        "number": "19",
        "name": "GND",
        "type": "power_in",
        "description": "For internal test only; connect this pin to ground."
      },
      {
        "number": "20",
        "name": "PWRGD",
        "type": "output",
        "description": "Open-drain power-good output that reflects the status of the selected channel(s), with channel 1 monitored by default."
      },
      {
        "number": "21",
        "name": "FB2",
        "type": "input",
        "description": "Channel 2 feedback sense input; tie to ground to ignore channel 2 when channels 1 and 2 operate in parallel."
      },
      {
        "number": "22",
        "name": "COMP2",
        "type": "passive",
        "description": "Channel 2 error-amplifier output with an RC network to ground; it is left open in parallel operation."
      },
      {
        "number": "23",
        "name": "EN2",
        "type": "input",
        "description": "Channel 2 precision enable input with a 0.8 V threshold; tie to ground to ignore EN2 in parallel operation."
      },
      {
        "number": "24",
        "name": "PVIN2",
        "type": "power_in",
        "description": "Channel 2 power input, bypassed to ground at this pin; the regulator input range is 4.5 V to 15 V."
      },
      {
        "number": "25",
        "name": "PVIN2",
        "type": "power_in",
        "description": "Channel 2 power input, bypassed to ground at this pin; the regulator input range is 4.5 V to 15 V."
      },
      {
        "number": "26",
        "name": "SW2",
        "type": "output",
        "description": "Channel 2 switch-node output."
      },
      {
        "number": "27",
        "name": "SW2",
        "type": "output",
        "description": "Channel 2 switch-node output."
      },
      {
        "number": "28",
        "name": "BST2",
        "type": "power_out",
        "description": "Bootstrap supply for the channel 2 high-side FET driver, connected through a 0.1 µF X5R or X7R ceramic capacitor to SW2."
      },
      {
        "number": "29",
        "name": "DL2",
        "type": "output",
        "description": "Channel 2 low-side FET gate driver; a resistor from this pin to ground sets the channel 2 current limit."
      },
      {
        "number": "30",
        "name": "PGND",
        "type": "power_in",
        "description": "Power ground for channels 1 and 2."
      },
      {
        "number": "31",
        "name": "DL1",
        "type": "output",
        "description": "Channel 1 low-side FET gate driver; a resistor from this pin to ground sets the channel 1 current limit."
      },
      {
        "number": "32",
        "name": "BST1",
        "type": "power_out",
        "description": "Bootstrap supply for the channel 1 high-side FET driver, connected through a 0.1 µF X5R or X7R ceramic capacitor to SW1."
      },
      {
        "number": "33",
        "name": "SW1",
        "type": "output",
        "description": "Channel 1 switch-node output."
      },
      {
        "number": "34",
        "name": "SW1",
        "type": "output",
        "description": "Channel 1 switch-node output."
      },
      {
        "number": "35",
        "name": "PVIN1",
        "type": "power_in",
        "description": "Input supply for the internal 5.1 V VREG regulator and the channel 1 buck regulator, bypassed to ground at this pin; PVIN1 must be above UVLO before other channels operate."
      },
      {
        "number": "36",
        "name": "PVIN1",
        "type": "power_in",
        "description": "Input supply for the internal 5.1 V VREG regulator and the channel 1 buck regulator, bypassed to ground at this pin; PVIN1 must be above UVLO before other channels operate."
      },
      {
        "number": "37",
        "name": "EN1",
        "type": "input",
        "description": "Channel 1 precision enable input with a 0.8 V threshold; an external resistor divider can set the start-up threshold."
      },
      {
        "number": "38",
        "name": "SS12",
        "type": "passive",
        "description": "Resistor divider between VREG and ground at this pin sets the soft-start time of channels 1 and 2 and selects parallel operation."
      },
      {
        "number": "39",
        "name": "COMP1",
        "type": "passive",
        "description": "Channel 1 error-amplifier output; an RC network is connected from this pin to ground."
      },
      {
        "number": "40",
        "name": "FB1",
        "type": "input",
        "description": "Channel 1 feedback sense input, with a 0.8 V reference for the adjustable output."
      },
      {
        "number": "41",
        "name": "RT",
        "type": "passive",
        "description": "A resistor from RT to ground sets the switching frequency between 250 kHz and 1.4 MHz."
      },
      {
        "number": "42",
        "name": "VDD",
        "type": "power_out",
        "description": "Output of the internal 3.3 V linear regulator, which requires a 1 µF ceramic capacitor to ground and is intended for internal circuits only."
      },
      {
        "number": "43",
        "name": "SYNC/MODE",
        "type": "bidirectional",
        "description": "Sync input or output pin for frequency synchronization to a 250 kHz to 1.4 MHz clock, and MODE pin where logic high selects forced PWM and logic low selects auto PWM/PSM."
      },
      {
        "number": "44",
        "name": "VREG",
        "type": "power_out",
        "description": "Output of the internal 5.1 V linear regulator, which requires a 1 µF ceramic capacitor to ground and supplies up to 95 mA total load including MOSFET driver current."
      },
      {
        "number": "45",
        "name": "FB3",
        "type": "input",
        "description": "Channel 3 feedback sense input."
      },
      {
        "number": "46",
        "name": "COMP3",
        "type": "passive",
        "description": "Channel 3 error-amplifier output; an RC network is connected from this pin to ground."
      },
      {
        "number": "47",
        "name": "SS34",
        "type": "passive",
        "description": "Resistor divider between VREG and ground at this pin sets the soft-start time of channels 3 and 4."
      },
      {
        "number": "48",
        "name": "EN3",
        "type": "input",
        "description": "Channel 3 precision enable input with a 0.8 V threshold; an external resistor divider can set the start-up threshold."
      },
      {
        "number": "49",
        "name": "EPAD",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The pin-configuration diagram (Figure 3, page 9) text layer is scrambled, so the pin-number-to-name ; The orderable MPN ADP5052ACPZ-R7 is the 48-lead LFCSP_WQ (CP-48-13, 7 mm x 7 mm) per the ordering gu; Table 6 lists several pins that share one name and description (e.g., GND on 17-19, PVIN2 on 24-25, ",
          "exposed pad 49 added from the footprint",
          "dropped thermal pad ['EP'] absent from footprint"
        ],
        "pages_sent": 33,
        "cost_usd": 0.2277,
        "at": "2026-10-18T02:47:28"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588918152915275777",
        "pages": 40,
        "sha256": "321e6ba8cd61f859",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 49,
        "described": 49,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "adp5052acpz-r7.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          7.0,
          7.0,
          0.77
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "f2b38b0b4bf967c77e683e8d4599608b9f0503055ec535b93c4ebb5d0163e916",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "adp5052acpz-r7-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          7.0,
          7.0,
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        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "67eaa3a96fc33808a7eaf110963e2fd01d33738c7f669e72a6f8dcd7fae30738",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}