main
Ray Publish 0.1.0 8d5324a 8h ago
{
  "slug": "adp2116acpz-r7",
  "version": "0.1.0",
  "type": "component",
  "description": "Analog Devices DC-DC Converters, LFCSP-32(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "power management (pmic)",
    "adp2116acpz-r7",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "adp2116acpz-r7.kicad_sym",
    "adp2116acpz-r7.kicad_mod",
    "adp2116acpz-r7.glb",
    "adp2116acpz-r7.step",
    "adp2116acpz-r7.lbr",
    "docs/hero.png",
    "docs/adp2116acpz-r7-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "adp2116acpz-r7-hero.glb",
    "adp2116acpz-r7-hero.overlay.json",
    "adp2116acpz-r7-etched.glb"
  ],
  "component": {
    "mpn": "ADP2116ACPZ-R7",
    "manufacturer": "Analog Devices",
    "package": "LFCSP-32(5x5)",
    "pin_count": 33,
    "category": "Power Management (PMIC)",
    "subcategory": "DC-DC Converters",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588939736711114752",
    "parts": {
      "symbol": "adp2116acpz-r7.kicad_sym",
      "footprint": "adp2116acpz-r7.kicad_mod",
      "model_3d": "adp2116acpz-r7-hero.glb",
      "model_3d_plain": "adp2116acpz-r7-etched.glb",
      "model_3d_step": "adp2116acpz-r7-etched.step",
      "model_3d_step_plain": "adp2116acpz-r7.step",
      "lbr": "adp2116acpz-r7.lbr"
    },
    "distributor_links": {
      "lcsc": "C659049"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T15:20:56Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "quota"
      },
      "mouser": {
        "pn": null,
        "status": "quota"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "GND",
        "type": "power_in",
        "description": "Ground for the internal analog and digital circuits; connect to the signal/analog ground plane before connecting to the power ground."
      },
      {
        "number": "2",
        "name": "COMP1",
        "type": "output",
        "description": "Channel 1 error amplifier output; connect a series RC network from COMP1 to GND to compensate the loop, and tie COMP1 and COMP2 together for multiphase operation."
      },
      {
        "number": "3",
        "name": "FREQ",
        "type": "input",
        "description": "Frequency select input; connect through a resistor to GND to set the switching frequency per Table 5."
      },
      {
        "number": "4",
        "name": "SCFG",
        "type": "input",
        "description": "Synchronization configuration input; tie to VDD to make SYNC/CLKOUT an output or tie to GND to make it an input."
      },
      {
        "number": "5",
        "name": "SYNC/CLKOUT",
        "type": "bidirectional",
        "description": "External synchronization input or internal clock output (set by SCFG); as an output it provides a buffered clock at twice the switching frequency with 90° phase shift, and as an input it synchronizes the converters to an external clock."
      },
      {
        "number": "6",
        "name": "OPCFG",
        "type": "input",
        "description": "Operation configuration input; tie to VDD or connect through a resistor to GND to set the operating mode per Table 7, including peak current limit selection and pulse skip enable/disable."
      },
      {
        "number": "7",
        "name": "COMP2",
        "type": "output",
        "description": "Channel 2 error amplifier output; connect a series RC network from COMP2 to GND to compensate the loop, and tie COMP1 and COMP2 together for multiphase operation."
      },
      {
        "number": "8",
        "name": "VDD",
        "type": "power_in",
        "description": "Power supply input for internal circuitry, specified from 2.75 V to 5.5 V; connect to VINx through a 10 Ω resistor as close as possible to the device and bypass to GND with 1 µF or greater."
      },
      {
        "number": "9",
        "name": "FB2",
        "type": "input",
        "description": "Channel 2 feedback input; connect to VOUT2 for fixed output, or to a resistor divider between VOUT2 and GND for adjustable output with a 0.6 V reference."
      },
      {
        "number": "10",
        "name": "V2SET",
        "type": "input",
        "description": "Channel 2 output voltage set pin; connect through a resistor to GND for a fixed output (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, or 3.3 V), or through 82 kΩ to GND or directly to VDD for adjustable output."
      },
      {
        "number": "11",
        "name": "SS2",
        "type": "passive",
        "description": "Channel 2 soft-start input; a capacitor from SS2 to GND sets the soft-start period, where 10 nF gives 1 ms, and SS2 is connected to SS1 in multiphase configurations."
      },
      {
        "number": "12",
        "name": "PGOOD2",
        "type": "output",
        "description": "Channel 2 open-drain power-good output; use a 100 kΩ pull-up to VDD or to a voltage of 5.5 V or less, and it is held low when Channel 2 is out of regulation."
      },
      {
        "number": "13",
        "name": "EN2",
        "type": "input",
        "description": "Channel 2 enable input; drive high to turn on and low to turn off the Channel 2 converter, tie to VDD for startup with VDD, and connect to EN1 in multiphase operation."
      },
      {
        "number": "14",
        "name": "VIN4",
        "type": "power_in",
        "description": "Power supply input and source of the high-side internal power MOSFET of Channel 2; VINx pins are rated up to 6 V with respect to PGND."
      },
      {
        "number": "15",
        "name": "VIN5",
        "type": "power_in",
        "description": "Power supply input and source of the high-side internal power MOSFET of Channel 2; VINx pins are rated up to 6 V with respect to PGND."
      },
      {
        "number": "16",
        "name": "VIN6",
        "type": "power_in",
        "description": "Power supply input and source of the high-side internal power MOSFET of Channel 2; VINx pins are rated up to 6 V with respect to PGND."
      },
      {
        "number": "17",
        "name": "SW4",
        "type": "output",
        "description": "Channel 2 switch node, the drain of the P-channel switch and N-channel synchronous rectifier; tie to SW3 and connect the output LC filter between this node and VOUT."
      },
      {
        "number": "18",
        "name": "SW3",
        "type": "output",
        "description": "Channel 2 switch node, the drain of the P-channel switch and N-channel synchronous rectifier; tie to SW4 and connect the output LC filter between this node and VOUT."
      },
      {
        "number": "19",
        "name": "PGND4",
        "type": "power_in",
        "description": "Channel 2 power ground, the source of the low-side internal power MOSFET; PGND1 through PGND4 are rated within 0.3 V of GND."
      },
      {
        "number": "20",
        "name": "PGND3",
        "type": "power_in",
        "description": "Channel 2 power ground, the source of the low-side internal power MOSFET; PGND1 through PGND4 are rated within 0.3 V of GND."
      },
      {
        "number": "21",
        "name": "PGND2",
        "type": "power_in",
        "description": "Channel 1 power ground, the source of the low-side internal power MOSFET; PGND1 through PGND4 are rated within 0.3 V of GND."
      },
      {
        "number": "22",
        "name": "PGND1",
        "type": "power_in",
        "description": "Channel 1 power ground, the source of the low-side internal power MOSFET; PGND1 through PGND4 are rated within 0.3 V of GND."
      },
      {
        "number": "23",
        "name": "SW2",
        "type": "output",
        "description": "Channel 1 switch node, the drain of the P-channel switch and N-channel synchronous rectifier; tie to SW1 and connect the output LC filter between this node and VOUT."
      },
      {
        "number": "24",
        "name": "SW1",
        "type": "output",
        "description": "Channel 1 switch node, the drain of the P-channel switch and N-channel synchronous rectifier; tie to SW2 and connect the output LC filter between this node and VOUT."
      },
      {
        "number": "25",
        "name": "VIN3",
        "type": "power_in",
        "description": "Power supply input and source of the high-side internal power MOSFET of Channel 1; VINx pins are rated up to 6 V with respect to PGND."
      },
      {
        "number": "26",
        "name": "VIN2",
        "type": "power_in",
        "description": "Power supply input and source of the high-side internal power MOSFET of Channel 1; VINx pins are rated up to 6 V with respect to PGND."
      },
      {
        "number": "27",
        "name": "VIN1",
        "type": "power_in",
        "description": "Power supply input and source of the high-side internal power MOSFET of Channel 1; VINx pins are rated up to 6 V with respect to PGND."
      },
      {
        "number": "28",
        "name": "EN1",
        "type": "input",
        "description": "Channel 1 enable input; drive high to turn on and low to turn off the Channel 1 converter, tie to VDD for startup with VDD, and connect to EN2 in multiphase operation."
      },
      {
        "number": "29",
        "name": "PGOOD1",
        "type": "output",
        "description": "Channel 1 open-drain power-good output; use a 100 kΩ pull-up to VDD or to a voltage of 5.5 V or less, and it is held low when Channel 1 is out of regulation."
      },
      {
        "number": "30",
        "name": "SS1",
        "type": "passive",
        "description": "Channel 1 soft-start input; a capacitor from SS1 to GND sets the soft-start period, where 10 nF gives 1 ms, and SS1 is connected to SS2 in multiphase configurations."
      },
      {
        "number": "31",
        "name": "V1SET",
        "type": "input",
        "description": "Channel 1 output voltage set pin; connect through a resistor to GND for a fixed output (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, or 3.3 V), or through 82 kΩ to GND or directly to VDD for adjustable output."
      },
      {
        "number": "32",
        "name": "FB1",
        "type": "input",
        "description": "Channel 1 feedback input; connect to VOUT1 for fixed output, or to a resistor divider between VOUT1 and GND for adjustable output with a 0.6 V reference."
      },
      {
        "number": "33",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The datasheet's pin function table does not assign ERC electrical types. Types were inferred from th; Pin 1 GND and the VDD, VINx and PGNDx pins are typed power_in per the GND rule. The exposed pad is n; Pages 4 and the datasheet pages between 8 and 35 were not in the supplied text. The pin table is com",
          "exposed pad 33 added from the footprint",
          "dropped thermal pad ['EP'] absent from footprint"
        ],
        "pages_sent": 9,
        "cost_usd": 0.0818,
        "at": "2026-10-18T15:20:41"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588939736711114752",
        "pages": 36,
        "sha256": "25682e0b04bc5f78",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 33,
        "described": 33,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "adp2116acpz-r7.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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          5.0,
          0.875
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "5fa713ea46b36980895812ed853577889b7cb06d275041a39b99bc0be305dc79",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "adp2116acpz-r7-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "c22ecccc19e3bd5f312045c70d554e893f0220bd5a744638e226fefdd46bc518",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}