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| Name | Last updated |
|---|---|
| NE555-metadata.json | 27d ago |
| NE555.kicad_sym | 27d ago |
| NE555.svg | 27d ago |
| README.md | 27d ago |
NE555
Precision timer IC for monostable, astable, and bistable timing circuits
| Field | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | PDIP-8 |
| Pins | 8 |
| Datasheet |
Pin Table
| # | Name | Type | Group | Description |
|---|---|---|---|---|
| 1 | GND | power_in | POWER | Ground reference. Connect to circuit ground plane with short, low-impedance trace. |
| 8 | VCC | power_in | POWER | Positive supply voltage input. Operating range 4.5V to 16V. Bypass with 100nF ceramic capacitor close to pin. |
| 2 | TRIG | input | TIMING | Trigger input. A negative pulse below 1/3 VCC initiates the timing cycle and sets the output high. Input impedance is... |
| 6 | THRES | input | TIMING | Threshold input. When voltage exceeds 2/3 VCC, the timing cycle ends and the output goes low. Typically connected to ... |
| 7 | DISCH | output | TIMING | Discharge output. Open-collector transistor output that discharges the external timing capacitor when the output goes... |
| 3 | OUT | output | OUTPUT | Timer output. Drives high (near VCC) or low (near GND) with up to 200mA sink/source capability. Rise and fall times a... |
| 4 | RESET | input | CONTROL | Active-low reset input. Pulling below 0.7V forces output low and overrides all other inputs. Tie to VCC through a 10k... |
| 5 | CTRL | input | CONTROL | Control voltage input. Provides direct access to the internal 2/3 VCC comparator reference. Bypass with 10nF capacito... |
Pin Groups
POWER
Supply pins. VCC accepts 4.5V–16V. Bypass VCC with 100nF ceramic close to the pin. GND is the reference for all internal comparators and the output stage.
TIMING
Timing network interface. TRIG starts the cycle (falling edge below 1/3 VCC), THRES ends it (rising above 2/3 VCC), and DISCH resets the external RC capacitor. Together they set the output pulse width: t = 1.1 × R × C.
OUTPUT
Push-pull output capable of sourcing or sinking up to 200mA. Drives TTL and CMOS loads directly. Output swings within ~1.5V of each rail.
CONTROL
RESET overrides all timing and forces output low. CTRL provides access to the internal voltage divider reference (2/3 VCC) for modulation or improved noise rejection.
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