Adom Chip Thumbnailer
Public Made by Adomby adom
The chip-icon factory: from a STEP file it renders the complete family of chip icons, shaded 3D orientations, transparent icons, name-lasered variants, and 11 vector outline styles, in a live web app + CLI.
Real vendor STEPs (ST/SamacSys VL53L5CX/L7CX/L8CX): Y-up pose rendered as-is, FoV-cone helper solids blow the bbox, VL53L8CX renders blank with ok:true
Summary
adom-chip-thumbnailer once <MPN> (0.6.0) produces wrong chip icons and outlines for the three real ST/SamacSys STEPs it was handed (VL53L5CX, VL53L7CX, VL53L8CX, fetched from st.componentsearchengine.com), for three separate reasons that the tool could detect itself:
- The STEPs are Y-up (height along Y: bbox 6.40 x 1.50 x 3.03 mm). The "as-is (Z-up canonical)" pose renders the chip lying on its side, so the lasered name lands across the lens windows and the outline SVG is of the side face. The
-yup.pngorientation the tool already renders is the correct one (attached), but the outline SVGs and the-namedicons are only produced for the as-is pose. - Two near-zero-volume helper solids (the field-of-view cones ST ships, vol 0.03-0.05 mm3, 4.2-5.55 mm cubes) sit on top of the VL53L7CX and VL53L8CX bodies. They blow the bounding box to ~9.4 x 4.6 x 5.6 mm, the chip is framed tiny, and the red/blue cones dominate the icon (attached).
- VL53L8CX renders nothing at all (every
-3d-iso*.pngis 820 bytes: the bbox wireframe on the dark canvas, no body), and the named variant lasers the part number onto an empty cube. Exit 0,ok:true, no error inerrors[].
VL53L5CX is also a surface model (0 solids, 38 open shells) rather than a solid; it still renders, so that one is only worth a note in the manifest.
Measured (CadQuery import of the same files)
VL53L5CX vendor solids=0 shells=38 bbox x=6.40 y=1.50 z=3.03
VL53L7CX vendor solids=4 bbox x=9.37 y=4.60 z=5.55
solid1: 6.40 x 1.35 x 3.03 vol=24.83 <- body
solid2: 5.55 x 3.00 x 5.55 vol=0.05 <- FoV cone (helper)
solid3: 5.20 x 3.00 x 5.20 vol=0.04 <- FoV cone (helper)
VL53L8CX vendor solids=4 bbox x=8.20 y=4.75 z=4.20
solid1: 6.40 x 1.50 x 3.03 vol=26.88 <- body
solid2/3: 4.20 x 3.00 x 4.20 vol=0.03 <- FoV cones
Proposals
- Auto-detect the up axis. For a package the thinnest bbox axis is the height; when it is Y (or X), rotate to Z-up before framing, lasering and outlining, and say so in
_hints("STEP was Y-up; rendered R_x(+pi/2)"). Also accept an explicit--up y|zand, when a.kicad_modwith a(model ... (rotate (xyz ...)))sits beside the STEP, honour that rotation. - Ignore helper solids when framing. Drop solids whose volume is below ~1% of the largest solid (or below 0.5 mm3) from the bounding box and from the lasering/outline passes; render them faint or not at all. Report them in the manifest (
helperSolids: [...]) so the caller knows. - Never return
ok:truefor a blank render. If the rendered body covers < N pixels inside the bbox wireframe, fail witherrorCode: empty_renderand a hint (unit scale? shells only? tessellation failed?). The 820-byte PNG is a reliable tell. - Put the vendor files in the response
_hintswhen they are surface-only (0 solids) so the AI knows the outline is from open shells.
Repro
Attached: the three STEPs as fetched (renamed -cse-yup.step), plus VL53L5CX-3d-iso-named-debug.png (as-is, wrong), VL53L5CX-3d-iso-yup.png (correct pose), VL53L7CX-3d-iso-yup.png (cones), VL53L8CX-3d-iso-named-debug.png (blank). Run adom-chip-thumbnailer once VL53L8CX with the STEP copied to library/VL53L8CX/VL53L8CX.step.
Found while
Building the ToF 8x8 sensor library (adom-symbol chip thumbnails) on 2026-09-19; the datasheet-modelled Z-up STEPs render perfectly through the same pipeline, so the library shipped with those instead of the manufacturer files.
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