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ADM7151ARDZ-04

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Analog Devices Linear Voltage Regulators (LDO), SOIC-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ADM7151ARDZ-04

Analog Devices · Linear Voltage Regulators (LDO) · SOIC-8-EP

ADM7151ARDZ-04 from Analog Devices, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VREG power_out Regulated input supply to the LDO amplifier; bypass VREG to GND with a 10 µF or greater capacitor and do not connect a load to ground.
2 VOUT power_out Regulated output voltage; bypass VOUT to GND with a 10 µF or greater capacitor.
3 BYP passive Low-noise bypass capacitor; connect a 1 µF capacitor to GND to reduce noise and do not connect a load to ground.
4 GND power_in Ground connection.
5 REF_SENSE input External resistor divider input used to set the output voltage, where VOUT = VREF × (R1 + R2)/R2 and VREF = 1.5 V.
6 REF output Low-noise reference voltage output; bypass to GND with a 1 µF capacitor, short REF_SENSE to REF for fixed output voltages, and do not connect a load to ground.
7 EN input Enable input; drive high to turn the regulator on and low to turn it off, and connect to VIN for automatic startup.
8 VIN power_in Regulator input supply; bypass VIN to GND with a 10 µF or greater capacitor.
9 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOIC-8-EP
Category Power Management ICs
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage range VIN 4.5 16 V 3
Operating supply current IGND 4.3 7 mA IOUT = 0 µA 3
Operating supply current IGND 8.6 12 mA IOUT = 800 mA 3
Shutdown current IIN-SD 0.1 3 µA VEN = GND 3
Voltage accuracy VOUT -1 1 % IOUT = 10 mA 3
Voltage accuracy over line, load and temperature VOUT -2 2 % 1 mA < IOUT < 800 mA, over line, load and temperature 3
Line regulation ΔVOUT/ΔVIN -0.01 0.01 %/V VIN = 4.5 V to 16 V 3
Load regulation ΔVOUT/ΔIOUT 0.5 1 %/A IOUT = 1 mA to 800 mA 3
VOUT current limit threshold ILIMIT 1 1.3 1.6 A 3
Dropout voltage VDROPOUT 0.3 0.6 V IOUT = 400 mA, VOUT = 5 V 3
Dropout voltage VDROPOUT 0.6 1.2 V IOUT = 800 mA, VOUT = 5 V 3
EN input leakage current IEN-LKG 0.1 1 µA VEN = VIN or GND 4
Minimum input capacitance CIN 7 µF TA = −40°C to +125°C 4
Minimum regulator capacitance CREG 7 µF TA = −40°C to +125°C 4
Minimum output capacitance COUT 7 µF TA = −40°C to +125°C 4
Minimum bypass capacitance CBYP 0.1 µF TA = −40°C to +125°C 4
Minimum reference capacitance CREF 0.7 µF TA = −40°C to +125°C 4
Capacitor ESR (CREG, COUT, CIN, CREF) RESR 0.001 0.2 Ω TA = −40°C to +125°C 4
Capacitor ESR (CBYP) RESR 0.001 2 Ω TA = −40°C to +125°C 4
VIN to GND -0.3 18 V 5
VREG to GND -0.3 6 V max is VIN or +6 V, whichever is less 5
VOUT to GND -0.3 6 V max is VREG or +6 V, whichever is less 5
VOUT to BYP -0.3 0.3 V ±0.3 V 5
EN to GND -0.3 18 V 5
BYP to GND -0.3 6 V max is VREG or +6 V, whichever is less 5
REF to GND -0.3 6 V max is VREG or +6 V, whichever is less 5
REF_SENSE to GND -0.3 6 V 5
Storage temperature range TSTG -65 150 °C 5
Junction temperature TJ 150 °C 5
Operating ambient temperature range TA -40 125 °C 5
Junction to ambient thermal resistance (8-Lead SOIC) θJA 36.9 °C/W 8-lead SOIC, worst-case, device soldered in circuit board 5
Junction to case thermal resistance (8-Lead SOIC) θJC 27.1 °C/W 8-lead SOIC, worst-case, device soldered in circuit board 5
Junction to board thermal characterization parameter (8-Lead SOIC) ΨJB 18.6 °C/W 8-lead SOIC, worst-case, device soldered in circuit board 5

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper of copper used to solder the package GND pin and exposed pad 19

CAD (KiCad official)

  • Symbol: ADM7151ARDZ-04
  • Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm
  • 3D model: SOIC-8-EP (KiCad packages3D, STEP)
  • 3D model files: adm7151ardz-04-etched.step / adm7151ardz-04-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adm7151ardz-04.step / adm7151ardz-04.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (24 pp, sha256 e2d199a9e640dbfe, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF