component
ADM1485ARZ-REEL7
Public Made by Adomby adom
Analog Devices RS-485 / RS-422 ICs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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ADM1485ARZ-REEL7
Analog Devices · RS-485 / RS-422 ICs · SOIC-8
ADM1485ARZ-REEL7 from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RO | output | Receiver output: driven High when A is at least 200 mV more positive than B, and Low when A is at least 200 mV more negative than B, only when the receiver is enabled. |
| 2 | RE | input | Receiver output enable: a low level enables the receiver output RO, and a high level places RO in a high-impedance state. |
| 3 | DE | input | Driver output enable: a high level enables the driver differential outputs A and B, and a low level places them in a high-impedance state. |
| 4 | DI | input | Driver input: when the driver is enabled, a logic low forces A low and B high, and a logic high forces A high and B low. |
| 5 | GND | power_in | Ground connection, 0 V. |
| 6 | A | bidirectional | Noninverting receiver input A and driver output A; the bus common-mode range is -7 V to +12 V. |
| 7 | B | bidirectional | Inverting receiver input B and driver output B; the bus common-mode range is -7 V to +12 V. |
| 8 | VCC | power_in | Power supply, 5 V ± 5%. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | SOIC-8 |
| Category | Interface |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Differential Output Voltage, no load (R = infinity) | VOD | 5 | V | R = ∞, Test Circuit 1 | 2 | ||
| Differential Output Voltage (RS-422, VCC = 5 V) | VOD | 2 | 5 | V | VCC = 5 V, R = 50 Ω (RS-422), Test Circuit 1 | 2 | |
| Differential Output Voltage (RS-485) | VOD | 1.5 | 5 | V | R = 27 Ω (RS-485), Test Circuit 1 | 2 | |
| Differential Output Voltage with common-mode test voltage | VOD3 | 1.5 | 5 | V | VTST = -7 V to +12 V, Test Circuit 2 | 2 | |
| Δ/VOD/ for Complementary Output States | Δ/VOD/ | 0.2 | V | R = 27 Ω or 50 Ω, Test Circuit 1 | 2 | ||
| Common-Mode Output Voltage | VOC | 3 | V | R = 27 Ω or 50 Ω, Test Circuit 1 | 2 | ||
| Δ/VOD/ for Complementary Output States (common-mode) | Δ/VOD/ | 0.2 | V | R = 27 Ω or 50 Ω | 2 | ||
| Output Short-Circuit Current (VOUT = High) | 35 | 250 | mA | -7 V ≤ VO ≤ +12 V | 2 | ||
| Output Short-Circuit Current (VOUT = Low) | 35 | 250 | mA | -7 V ≤ VO ≤ +12 V | 2 | ||
| CMOS Input Logic Threshold Low (driver) | VINL | 0.8 | V | 2 | |||
| CMOS Input Logic Threshold High (driver) | VINH | 2 | V | 2 | |||
| Logic Input Current (DE, DI) | -1 | 1 | μA | 2 | |||
| Differential Input Threshold Voltage | VTH | -0.2 | 0.2 | V | -7 V ≤ VCM ≤ +12 V | 2 | |
| Input Resistance | 12 | kΩ | -7 V ≤ VCM ≤ +12 V | 2 | |||
| Input Current (A, B) at VIN = +12 V | 1 | mA | VIN = +12 V | 2 | |||
| Input Current (A, B) at VIN = -7 V | -0.8 | mA | VIN = -7 V | 2 | |||
| CMOS Input Logic Threshold Low (receiver enable) | VINL | 0.8 | V | 2 | |||
| CMOS Input Logic Threshold High (receiver enable) | VINH | 2 | V | 2 | |||
| Logic Enable Input Current (RE) | -1 | 1 | μA | 2 | |||
| CMOS Output Voltage Low | VOL | 0.4 | V | IOUT = +4.0 mA | 2 | ||
| CMOS Output Voltage High | VOH | 4 | V | IOUT = -4.0 mA | 2 | ||
| Short-Circuit Output Current | 7 | 85 | mA | VOUT = GND or VCC | 2 | ||
| Three-State Output Leakage Current | -1 | 1 | μA | 0.4 V ≤ VOUT ≤ 2.4 V | 2 | ||
| Propagation Delay Input to Output (driver) | tPLH, tPHL | 2 | 10 | 15 | ns | RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, Test Circuit 3 | 2 |
| Driver O/P to O/P Skew | tSKEW | 1 | 5 | ns | RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, Test Circuit 3 | 2 | |
| Driver Rise/Fall Time | tR, tF | 8 | 15 | ns | RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, Test Circuit 3 | 2 | |
| Driver Enable to Output Valid | 10 | 25 | ns | RL = 110 Ω, CL = 50 pF, Test Circuit 4 | 2 | ||
| Driver Disable Timing | 10 | 25 | ns | RL = 110 Ω, CL = 50 pF, Test Circuit 4 | 2 | ||
| Matched Enable Switching | /tAZH -tBZL/, /tBZH -tAZL/ | 0 | 2 | ns | RL = 110 Ω, CL = 50 pF, Test Circuit 4* | 2 | |
| Matched Disable Switching | /tAHZ -tBLZ/, /tBHZ -tALZ/ | 0 | 2 | ns | RL = 110 Ω, CL = 50 pF, Test Circuit 4* | 2 | |
| Propagation Delay Input to Output (receiver) | tPLH, tPHL | 8 | 15 | 30 | ns | CL = 15 pF, Test Circuit 5 | 2 |
| Receiver Skew | /tPLH -tPHL/ | 5 | ns | CL = 15 pF, Test Circuit 5 | 2 | ||
| Receiver Enable | tEN1 | 5 | 20 | ns | CL = 15 pF, RL = 1 kΩ, Test Circuit 6 | 2 | |
| Receiver Disable | tEN2 | 5 | 20 | ns | CL = 15 pF, RL = 1 kΩ, Test Circuit 6 | 2 | |
| Tx Pulse Width Distortion | 1 | ns | 2 | ||||
| Rx Pulse Width Distortion | 1 | ns | 2 | ||||
| ICC (Outputs Enabled) | ICC | 1 | 2.2 | mA | Digital Inputs = GND or VCC | 2 | |
| ICC (Outputs Disabled) | ICC | 0.6 | 1 | mA | Digital Inputs = GND or VCC | 2 | |
| Supply Voltage VCC | VCC | -0.3 | 7 | V | 3 | ||
| Driver Input (DI), max = VCC + 0.3 V | -0.3 | V | 3 | ||||
| Control Inputs (DE, RE), max = VCC + 0.3 V | -0.3 | V | 3 | ||||
| Receiver Inputs (A, B) | -9 | 14 | V | 3 | |||
| Driver Outputs (A, B) | -9 | 14 | V | 3 | |||
| Receiver Output, max = VCC + 0.5 V | -0.5 | V | 3 | ||||
| Power Dissipation 8-Lead SOIC | 450 | mW | 3 | ||||
| Operating Temperature Range, Industrial (A Version) | -40 | 85 | °C | A Version | 3 | ||
| Storage Temperature Range | -65 | 150 | °C | 3 | |||
| Lead Temperature, Soldering | 300 | °C | 10 sec | 3 | |||
| Lead Temperature, Vapor Phase | 215 | °C | 60 sec | 3 | |||
| Lead Temperature, Infrared | 220 | °C | 15 sec | 3 | |||
| Supply voltage tolerance | VCC | -5 | 5 | % | 5 V ± 5% | 2 | |
| θJA Thermal Impedance, 8-Lead SOIC | θJA | 170 | °C/W | 8-Lead SOIC | 3 | ||
| Supply Voltage VCC (nominal) | VCC | 5 | V | 5 V ± 5% | 2 |
CAD (KiCad official)
- Symbol:
ADM1485ARZ-REEL7 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
adm1485arz-reel7-etched.step/adm1485arz-reel7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);adm1485arz-reel7.step/adm1485arz-reel7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (11 pp, sha256
b82bfe64cbc6738f, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# ADM1485ARZ-REEL7
**Analog Devices** · RS-485 / RS-422 ICs · SOIC-8
ADM1485ARZ-REEL7 from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RO | output | Receiver output: driven High when A is at least 200 mV more positive than B, and Low when A is at least 200 mV more negative than B, only when the receiver is enabled. |
| 2 | RE | input | Receiver output enable: a low level enables the receiver output RO, and a high level places RO in a high-impedance state. |
| 3 | DE | input | Driver output enable: a high level enables the driver differential outputs A and B, and a low level places them in a high-impedance state. |
| 4 | DI | input | Driver input: when the driver is enabled, a logic low forces A low and B high, and a logic high forces A high and B low. |
| 5 | GND | power_in | Ground connection, 0 V. |
| 6 | A | bidirectional | Noninverting receiver input A and driver output A; the bus common-mode range is -7 V to +12 V. |
| 7 | B | bidirectional | Inverting receiver input B and driver output B; the bus common-mode range is -7 V to +12 V. |
| 8 | VCC | power_in | Power supply, 5 V ± 5%. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | SOIC-8 |
| Category | Interface |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Differential Output Voltage, no load (R = infinity) | VOD | | | 5 | V | R = ∞, Test Circuit 1 | 2 |
| Differential Output Voltage (RS-422, VCC = 5 V) | VOD | 2 | | 5 | V | VCC = 5 V, R = 50 Ω (RS-422), Test Circuit 1 | 2 |
| Differential Output Voltage (RS-485) | VOD | 1.5 | | 5 | V | R = 27 Ω (RS-485), Test Circuit 1 | 2 |
| Differential Output Voltage with common-mode test voltage | VOD3 | 1.5 | | 5 | V | VTST = -7 V to +12 V, Test Circuit 2 | 2 |
| Δ/VOD/ for Complementary Output States | Δ/VOD/ | | | 0.2 | V | R = 27 Ω or 50 Ω, Test Circuit 1 | 2 |
| Common-Mode Output Voltage | VOC | | | 3 | V | R = 27 Ω or 50 Ω, Test Circuit 1 | 2 |
| Δ/VOD/ for Complementary Output States (common-mode) | Δ/VOD/ | | | 0.2 | V | R = 27 Ω or 50 Ω | 2 |
| Output Short-Circuit Current (VOUT = High) | | 35 | | 250 | mA | -7 V ≤ VO ≤ +12 V | 2 |
| Output Short-Circuit Current (VOUT = Low) | | 35 | | 250 | mA | -7 V ≤ VO ≤ +12 V | 2 |
| CMOS Input Logic Threshold Low (driver) | VINL | | | 0.8 | V | | 2 |
| CMOS Input Logic Threshold High (driver) | VINH | 2 | | | V | | 2 |
| Logic Input Current (DE, DI) | | -1 | | 1 | μA | | 2 |
| Differential Input Threshold Voltage | VTH | -0.2 | | 0.2 | V | -7 V ≤ VCM ≤ +12 V | 2 |
| Input Resistance | | 12 | | | kΩ | -7 V ≤ VCM ≤ +12 V | 2 |
| Input Current (A, B) at VIN = +12 V | | | | 1 | mA | VIN = +12 V | 2 |
| Input Current (A, B) at VIN = -7 V | | -0.8 | | | mA | VIN = -7 V | 2 |
| CMOS Input Logic Threshold Low (receiver enable) | VINL | | | 0.8 | V | | 2 |
| CMOS Input Logic Threshold High (receiver enable) | VINH | 2 | | | V | | 2 |
| Logic Enable Input Current (RE) | | -1 | | 1 | μA | | 2 |
| CMOS Output Voltage Low | VOL | | | 0.4 | V | IOUT = +4.0 mA | 2 |
| CMOS Output Voltage High | VOH | 4 | | | V | IOUT = -4.0 mA | 2 |
| Short-Circuit Output Current | | 7 | | 85 | mA | VOUT = GND or VCC | 2 |
| Three-State Output Leakage Current | | -1 | | 1 | μA | 0.4 V ≤ VOUT ≤ 2.4 V | 2 |
| Propagation Delay Input to Output (driver) | tPLH, tPHL | 2 | 10 | 15 | ns | RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, Test Circuit 3 | 2 |
| Driver O/P to O/P Skew | tSKEW | | 1 | 5 | ns | RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, Test Circuit 3 | 2 |
| Driver Rise/Fall Time | tR, tF | 8 | | 15 | ns | RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, Test Circuit 3 | 2 |
| Driver Enable to Output Valid | | 10 | | 25 | ns | RL = 110 Ω, CL = 50 pF, Test Circuit 4 | 2 |
| Driver Disable Timing | | 10 | | 25 | ns | RL = 110 Ω, CL = 50 pF, Test Circuit 4 | 2 |
| Matched Enable Switching | /tAZH -tBZL/, /tBZH -tAZL/ | 0 | | 2 | ns | RL = 110 Ω, CL = 50 pF, Test Circuit 4* | 2 |
| Matched Disable Switching | /tAHZ -tBLZ/, /tBHZ -tALZ/ | 0 | | 2 | ns | RL = 110 Ω, CL = 50 pF, Test Circuit 4* | 2 |
| Propagation Delay Input to Output (receiver) | tPLH, tPHL | 8 | 15 | 30 | ns | CL = 15 pF, Test Circuit 5 | 2 |
| Receiver Skew | /tPLH -tPHL/ | | | 5 | ns | CL = 15 pF, Test Circuit 5 | 2 |
| Receiver Enable | tEN1 | 5 | | 20 | ns | CL = 15 pF, RL = 1 kΩ, Test Circuit 6 | 2 |
| Receiver Disable | tEN2 | 5 | | 20 | ns | CL = 15 pF, RL = 1 kΩ, Test Circuit 6 | 2 |
| Tx Pulse Width Distortion | | | | 1 | ns | | 2 |
| Rx Pulse Width Distortion | | | | 1 | ns | | 2 |
| ICC (Outputs Enabled) | ICC | | 1 | 2.2 | mA | Digital Inputs = GND or VCC | 2 |
| ICC (Outputs Disabled) | ICC | | 0.6 | 1 | mA | Digital Inputs = GND or VCC | 2 |
| Supply Voltage VCC | VCC | -0.3 | | 7 | V | | 3 |
| Driver Input (DI), max = VCC + 0.3 V | | -0.3 | | | V | | 3 |
| Control Inputs (DE, RE), max = VCC + 0.3 V | | -0.3 | | | V | | 3 |
| Receiver Inputs (A, B) | | -9 | | 14 | V | | 3 |
| Driver Outputs (A, B) | | -9 | | 14 | V | | 3 |
| Receiver Output, max = VCC + 0.5 V | | -0.5 | | | V | | 3 |
| Power Dissipation 8-Lead SOIC | | | | 450 | mW | | 3 |
| Operating Temperature Range, Industrial (A Version) | | -40 | | 85 | °C | A Version | 3 |
| Storage Temperature Range | | -65 | | 150 | °C | | 3 |
| Lead Temperature, Soldering | | | | 300 | °C | 10 sec | 3 |
| Lead Temperature, Vapor Phase | | | | 215 | °C | 60 sec | 3 |
| Lead Temperature, Infrared | | | | 220 | °C | 15 sec | 3 |
| Supply voltage tolerance | VCC | -5 | | 5 | % | 5 V ± 5% | 2 |
| θJA Thermal Impedance, 8-Lead SOIC | θJA | | 170 | | °C/W | 8-Lead SOIC | 3 |
| Supply Voltage VCC (nominal) | VCC | | 5 | | V | 5 V ± 5% | 2 |
## CAD (KiCad official)
- Symbol: `ADM1485ARZ-REEL7`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `adm1485arz-reel7-etched.step` / `adm1485arz-reel7-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `adm1485arz-reel7.step` / `adm1485arz-reel7.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Analog Devices datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588915862195875840) (11 pp, sha256 `b82bfe64cbc6738f`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/adm1485arz-reel7-datasheet.pdf)