component
ADF4158CCPZ-RL7
Public Made by Adomby adom
Analog Devices Clock Generators, PLLs, Frequency Synthesizers, LFCSP-24(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
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"version": "0.1.0",
"type": "component",
"description": "Analog Devices Clock Generators, PLLs, Frequency Synthesizers, LFCSP-24(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
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"clock-timing",
"adf4158ccpz-rl7",
"factory-2.0.0",
"extractor-text"
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"component": {
"mpn": "ADF4158CCPZ-RL7",
"manufacturer": "Analog Devices",
"package": "LFCSP-24(4x4)",
"pin_count": 25,
"category": "Clock/Timing",
"subcategory": "Clock Generators, PLLs, Frequency Synthesizers",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588935668093628416",
"parts": {
"symbol": "adf4158ccpz-rl7.kicad_sym",
"footprint": "adf4158ccpz-rl7.kicad_mod",
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"lbr": "adf4158ccpz-rl7.lbr"
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"distributor_links": {
"lcsc": "C462162",
"digikey": "ADF4158CCPZ-RL7TR-ND",
"mouser": "584-ADF4158CCPZ-R7"
},
"distributor_check": {
"checked_at": "2026-10-20T23:24:30Z",
"source": "Component Ocean /api/assign-pns",
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"pn": "ADF4158CCPZ-RL7TR-ND",
"status": "found",
"lifecycle": "Active"
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"pn": "584-ADF4158CCPZ-R7",
"status": "found"
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},
"pins": [
{
"number": "1",
"name": "CPGND",
"type": "power_in",
"description": "Charge pump ground; this is the ground return for the charge pump."
},
{
"number": "2",
"name": "AGND",
"type": "power_in",
"description": "Analog ground; this is the ground return for the prescaler."
},
{
"number": "3",
"name": "AGND",
"type": "power_in",
"description": "Analog ground; this is the ground return for the prescaler."
},
{
"number": "4",
"name": "RFINB",
"type": "input",
"description": "Complementary RF prescaler input, decoupled to the ground plane through a small bypass capacitor (typically 100 pF)."
},
{
"number": "5",
"name": "RFINA",
"type": "input",
"description": "RF prescaler input; this small-signal input is normally AC-coupled from the VCO."
},
{
"number": "6",
"name": "AVDD",
"type": "power_in",
"description": "Positive supply for the RF section; decouple to the digital ground plane close to the pin, and AVDD must be the same voltage as DVDD."
},
{
"number": "7",
"name": "AVDD",
"type": "power_in",
"description": "Positive supply for the RF section; decouple to the digital ground plane close to the pin, and AVDD must be the same voltage as DVDD."
},
{
"number": "8",
"name": "AVDD",
"type": "power_in",
"description": "Positive supply for the RF section; decouple to the digital ground plane close to the pin, and AVDD must be the same voltage as DVDD."
},
{
"number": "9",
"name": "REFIN",
"type": "input",
"description": "Reference input; a CMOS input with a nominal threshold of VDD/2 and a 100 kΩ equivalent input resistance that can be driven by a TTL or CMOS crystal oscillator or AC-coupled."
},
{
"number": "10",
"name": "DGND",
"type": "power_in",
"description": "Digital ground."
},
{
"number": "11",
"name": "SDGND",
"type": "power_in",
"description": "Ground return for the digital sigma-delta modulator."
},
{
"number": "12",
"name": "TXDATA",
"type": "input",
"description": "Tx data pin; supplies the data sent in FSK or PSK modulation mode."
},
{
"number": "13",
"name": "CE",
"type": "input",
"description": "Chip enable; a logic low on this pin powers the device down and puts the charge pump output into three-state mode."
},
{
"number": "14",
"name": "CLK",
"type": "input",
"description": "Serial clock input used to shift serial data into the register; data is latched into the shift register on the CLK rising edge, and this is a high-impedance CMOS input."
},
{
"number": "15",
"name": "DATA",
"type": "input",
"description": "Serial data input, loaded MSB first with the three LSBs used as control bits; this is a high-impedance CMOS input."
},
{
"number": "16",
"name": "LE",
"type": "input",
"description": "Load enable, CMOS input; when LE goes high, the data stored in the shift register is loaded into one of eight latches selected by the control bits."
},
{
"number": "17",
"name": "MUXOUT",
"type": "output",
"description": "Multiplexer output allowing external access to RF lock detect, scaled RF, or reference frequency."
},
{
"number": "18",
"name": "SDVDD",
"type": "power_in",
"description": "Power supply pin for the digital sigma-delta modulator; its voltage must equal AVDD, and a decoupling capacitor should be placed close to the pin."
},
{
"number": "19",
"name": "DVDD",
"type": "power_in",
"description": "Positive supply for the digital section; decouple close to the pin, and DVDD must be the same voltage as AVDD."
},
{
"number": "20",
"name": "SW1",
"type": "passive",
"description": "Switch used for fast lock."
},
{
"number": "21",
"name": "SW2",
"type": "passive",
"description": "Switch used for fast lock."
},
{
"number": "22",
"name": "VP",
"type": "power_in",
"description": "Charge pump supply; this pin must be greater than or equal to VDD, and in a 3 V system it can be set to 5.5 V to drive a VCO with a tuning range up to 5.5 V."
},
{
"number": "23",
"name": "RSET",
"type": "passive",
"description": "A resistor connected between this pin and ground sets the maximum charge pump output current; the datasheet example gives ICPmax = 5 mA for RSET = 5.1 kΩ."
},
{
"number": "24",
"name": "CP",
"type": "output",
"description": "Charge pump output; when enabled it supplies ±ICP to the external loop filter, which drives the external VCO."
},
{
"number": "25",
"name": "EPAD",
"type": "power_in",
"description": "Exposed paddle on the LFCSP that must be connected to GND."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The Table 5 pin-function list was used for the pinout because the pin-configuration diagram text on ; The exposed paddle is listed as pin 25 (EPAD) in Table 5, but it is not a numbered lead on the 24-pi; The RSET equation on page 8 (I_CPmax vs R_SET) is garbled in the extracted text, so the formula is n"
],
"pages_sent": 21,
"cost_usd": 0.1219,
"at": "2026-10-20T23:22:45"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588935668093628416",
"pages": 36,
"sha256": "7b6bbb25f289e954",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 25,
"described": 25,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
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"checked": "2026-10-20",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
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{
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}
}