component
ADC78H90CIMTX
Public Made by Adomby adom
Texas Instruments Global Sourcing Parts, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
Ray
Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout")
4db780e
11d ago
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{
"number": "1",
"name": "CS",
"type": "input",
"description": "Chip select; on the falling edge of CS, a conversion process begins and conversions continue as long as CS is held low."
},
{
"number": "2",
"name": "AVDD",
"type": "power_in",
"description": "Positive analog supply pin; connect to +2.7V to +5.25V source and bypass with 1 µF tantalum and 0.1 µF ceramic capacitors within 1 cm of the power pin."
},
{
"number": "3",
"name": "AGND",
"type": "power_in",
"description": "Ground return for the analog supply and signals."
},
{
"number": "4",
"name": "AIN1",
"type": "input",
"description": "Analog input 1; input voltage range 0V to AVDD."
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{
"number": "5",
"name": "AIN2",
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{
"number": "6",
"name": "AIN3",
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"description": "Analog input 3; input voltage range 0V to AVDD."
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{
"number": "7",
"name": "AIN4",
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{
"number": "8",
"name": "AIN5",
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{
"number": "9",
"name": "AIN6",
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"description": "Analog input 6; input voltage range 0V to AVDD."
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{
"number": "10",
"name": "AIN7",
"type": "input",
"description": "Analog input 7; input voltage range 0V to AVDD."
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{
"number": "11",
"name": "AIN8",
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"description": "Analog input 8; input voltage range 0V to AVDD."
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{
"number": "12",
"name": "DGND",
"type": "power_in",
"description": "Ground return for the digital supply and signals."
},
{
"number": "13",
"name": "DVDD",
"type": "power_in",
"description": "Positive digital supply pin; connect to +2.7V to AVDD supply and bypass with 0.1 µF ceramic capacitor within 1 cm of the power pin."
},
{
"number": "14",
"name": "DIN",
"type": "input",
"description": "Digital data input; the ADC78H90's Control Register is loaded through this pin on rising edges of the SCLK pin."
},
{
"number": "15",
"name": "DOUT",
"type": "output",
"description": "Digital data output; output samples are clocked out on falling edges of the SCLK pin in straight binary format."
},
{
"number": "16",
"name": "SCLK",
"type": "input",
"description": "Digital clock input; frequency range 50 kHz to 8 MHz; directly controls the conversion and readout processes."
}
],
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"primary_model": "claude-haiku-4-5-20251001",
"primary_mode": "text",
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"guards": "pin_guards 0.1: passed",
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"cost_usd": 0.2495,
"at": "2026-09-23T08:28:05"
},
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"pages": 26,
"sha256": "5e36949770d797e0",
"source_tier": "lcsc"
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"updated_at": "2026-09-24T15:50:09.895Z"
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