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docs adc78h90cimtx: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 2d ago
viewers adc78h90cimtx: viewers · Ray 12d ago
adc78h90cimtx-etched.fit.json adc78h90cimtx: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 2d ago
adc78h90cimtx-etched.glb adc78h90cimtx: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 2d ago
adc78h90cimtx-etched.step adc78h90cimtx: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 2d ago
adc78h90cimtx.glb Publish 0.1.0 · Ray 12d ago
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package.json Publish 0.1.0 · Ray 12d ago
page.json Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout") · Ray 11d ago
README.md Initial commit: component/adc78h90cimtx · Ray 12d ago

ADC78H90CIMTX

Texas Instruments · Global Sourcing Parts · TSSOP-16

ADC78H90CIMTX from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CS input Chip select; on the falling edge of CS, a conversion process begins and conversions continue as long as CS is held low.
2 AVDD power_in Positive analog supply pin; connect to +2.7V to +5.25V source and bypass with 1 µF tantalum and 0.1 µF ceramic capacitors within 1 cm of the power pin.
3 AGND power_in Ground return for the analog supply and signals.
4 AIN1 input Analog input 1; input voltage range 0V to AVDD.
5 AIN2 input Analog input 2; input voltage range 0V to AVDD.
6 AIN3 input Analog input 3; input voltage range 0V to AVDD.
7 AIN4 input Analog input 4; input voltage range 0V to AVDD.
8 AIN5 input Analog input 5; input voltage range 0V to AVDD.
9 AIN6 input Analog input 6; input voltage range 0V to AVDD.
10 AIN7 input Analog input 7; input voltage range 0V to AVDD.
11 AIN8 input Analog input 8; input voltage range 0V to AVDD.
12 DGND power_in Ground return for the digital supply and signals.
13 DVDD power_in Positive digital supply pin; connect to +2.7V to AVDD supply and bypass with 0.1 µF ceramic capacitor within 1 cm of the power pin.
14 DIN input Digital data input; the ADC78H90's Control Register is loaded through this pin on rising edges of the SCLK pin.
15 DOUT output Digital data output; output samples are clocked out on falling edges of the SCLK pin in straight binary format.
16 SCLK input Digital clock input; frequency range 50 kHz to 8 MHz; directly controls the conversion and readout processes.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category Global Sourcing Parts
Pins 16

CAD (KiCad official)

  • Symbol: ADC78H90CIMTX
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: adc78h90cimtx-etched.step / adc78h90cimtx-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adc78h90cimtx.step / adc78h90cimtx.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (26 pp, sha256 5e36949770d797e0, retrieved 2026-09-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF