ADC12L066CIVY

{
  "slug": "adc12l066civy",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Analog To Digital Converters (ADC), TQFP-32(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "data acquisition",
    "adc12l066civy",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "adc12l066civy.kicad_sym",
    "adc12l066civy.kicad_mod",
    "adc12l066civy.glb",
    "adc12l066civy.step",
    "adc12l066civy.lbr",
    "docs/hero.png",
    "docs/adc12l066civy-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "adc12l066civy-hero.glb",
    "adc12l066civy-hero.overlay.json"
  ],
  "component": {
    "mpn": "ADC12L066CIVY",
    "manufacturer": "Texas Instruments",
    "package": "TQFP-32(7x7)",
    "pin_count": 32,
    "category": "Data Acquisition",
    "subcategory": "Analog To Digital Converters (ADC)",
    "datasheet": "https://www.ti.com/cn/lit/gpn/adc12l066",
    "parts": {
      "symbol": "adc12l066civy.kicad_sym",
      "footprint": "adc12l066civy.kicad_mod",
      "model_3d": "adc12l066civy-hero.glb",
      "model_3d_plain": "adc12l066civy.glb",
      "model_3d_step": "adc12l066civy-etched.step",
      "model_3d_step_plain": "adc12l066civy.step",
      "lbr": "adc12l066civy.lbr"
    },
    "distributor_links": {
      "lcsc": "C1542914",
      "mouser": "926-ADC12L066CIVY"
    },
    "distributor_check": {
      "checked_at": "2026-10-08T22:08:45Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": "926-ADC12L066CIVY",
        "status": "found",
        "lifecycle": "Obsolete"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VREF",
        "type": "power_in",
        "description": "Reference input bypassed to AGND with a 0.1 µF monolithic capacitor; VREF is 1.0 V nominal and should be between 0.8 V and 1.5 V."
      },
      {
        "number": "2",
        "name": "VIN+",
        "type": "power_in",
        "description": "Positive analog signal input; with VREF = 1.0 V the differential input is 2.0 VP-P, and the input peaks should never exceed VA − 0.8 V."
      },
      {
        "number": "3",
        "name": "VIN-",
        "type": "power_in",
        "description": "Negative analog signal input that may be tied to VCM for single-ended operation, but a differential input signal is required for best performance."
      },
      {
        "number": "4",
        "name": "AGND",
        "type": "power_in",
        "description": "Ground return for the analog supply."
      },
      {
        "number": "5",
        "name": "VA",
        "type": "power_in",
        "description": "Positive analog supply, operated from +3.0 V to +3.6 V and bypassed to AGND with a 0.1 µF capacitor within 1 cm plus a 10 µF capacitor."
      },
      {
        "number": "6",
        "name": "VA",
        "type": "power_in",
        "description": "Positive analog supply, operated from +3.0 V to +3.6 V and bypassed to AGND with a 0.1 µF capacitor within 1 cm plus a 10 µF capacitor."
      },
      {
        "number": "7",
        "name": "AGND",
        "type": "power_in",
        "description": "Ground return for the analog supply."
      },
      {
        "number": "8",
        "name": "PD",
        "type": "input",
        "description": "Power-down input; when high the converter is held in power-down mode (50 mW with a 66 MHz clock), and when low it is in active mode."
      },
      {
        "number": "9",
        "name": "DGND",
        "type": "power_in",
        "description": "Ground return for the digital supply."
      },
      {
        "number": "10",
        "name": "CLK",
        "type": "input",
        "description": "Clock input with a range of 1 MHz to 80 MHz (typical), specified performance at 66 MHz, sampled on the rising edge."
      },
      {
        "number": "11",
        "name": "OE",
        "type": "input",
        "description": "Output enable; when low the TRI-STATE data outputs are enabled, and when high they are placed in a high impedance state."
      },
      {
        "number": "12",
        "name": "DGND",
        "type": "power_in",
        "description": "Ground return for the digital supply."
      },
      {
        "number": "13",
        "name": "VD",
        "type": "power_in",
        "description": "Positive digital supply, connected to the same quiet +3.3 V source as VA and bypassed to DGND with a 0.1 µF capacitor in parallel with a 10 µF capacitor within 1 cm of the pin."
      },
      {
        "number": "14",
        "name": "D0",
        "type": "tri_state",
        "description": "Digital output bit 0 (LSB) of the 12-bit offset binary conversion result, TTL/CMOS compatible and TRI-STATE controlled by OE."
      },
      {
        "number": "15",
        "name": "D1",
        "type": "tri_state",
        "description": "Digital output bit 1 of the 12-bit offset binary conversion result, TTL/CMOS compatible and TRI-STATE controlled by OE."
      },
      {
        "number": "16",
        "name": "D2",
        "type": "tri_state",
        "description": "Digital output bit 2 of the 12-bit offset binary conversion result, TTL/CMOS compatible and TRI-STATE controlled by OE."
      },
      {
        "number": "17",
        "name": "D3",
        "type": "tri_state",
        "description": "Digital output bit 3 of the 12-bit offset binary conversion result, TTL/CMOS compatible and TRI-STATE controlled by OE."
      },
      {
        "number": "18",
        "name": "D4",
        "type": "tri_state",
        "description": "Digital output bit 4 of the 12-bit offset binary conversion result, TTL/CMOS compatible and TRI-STATE controlled by OE."
      },
      {
        "number": "19",
        "name": "D5",
        "type": "tri_state",
        "description": "Digital output bit 5 of the 12-bit offset binary conversion result, TTL/CMOS compatible and TRI-STATE controlled by OE."
      },
      {
        "number": "20",
        "name": "DR GND",
        "type": "power_in",
        "description": "Ground return for the digital supply of the output drivers, to be connected to system digital ground and not in close proximity to the DGND or AGND pins."
      },
      {
        "number": "21",
        "name": "VDR",
        "type": "power_in",
        "description": "Positive supply for the output drivers, from +1.8 V to VD, which must never exceed VD by more than 300 mV."
      },
      {
        "number": "22",
        "name": "D6",
        "type": "tri_state",
        "description": "Digital output bit 6 of the 12-bit offset binary conversion result, TTL/CMOS compatible and TRI-STATE controlled by OE."
      },
      {
        "number": "23",
        "name": "D7",
        "type": "tri_state",
        "description": "Digital output bit 7 of the 12-bit offset binary conversion result, TTL/CMOS compatible and TRI-STATE controlled by OE."
      },
      {
        "number": "24",
        "name": "D8",
        "type": "tri_state",
        "description": "Digital output bit 8 of the 12-bit offset binary conversion result, TTL/CMOS compatible and TRI-STATE controlled by OE."
      },
      {
        "number": "25",
        "name": "D9",
        "type": "tri_state",
        "description": "Digital output bit 9 of the 12-bit offset binary conversion result, TTL/CMOS compatible and TRI-STATE controlled by OE."
      },
      {
        "number": "26",
        "name": "D10",
        "type": "tri_state",
        "description": "Digital output bit 10 of the 12-bit offset binary conversion result, TTL/CMOS compatible and TRI-STATE controlled by OE."
      },
      {
        "number": "27",
        "name": "D11",
        "type": "tri_state",
        "description": "Digital output bit 11 (MSB) of the 12-bit offset binary conversion result, TTL/CMOS compatible and TRI-STATE controlled by OE."
      },
      {
        "number": "28",
        "name": "AGND",
        "type": "power_in",
        "description": "Ground return for the analog supply."
      },
      {
        "number": "29",
        "name": "VA",
        "type": "power_in",
        "description": "Positive analog supply, operated from +3.0 V to +3.6 V and bypassed to AGND with a 0.1 µF capacitor within 1 cm plus a 10 µF capacitor."
      },
      {
        "number": "30",
        "name": "VRN",
        "type": "passive",
        "description": "High impedance reference bypass pin, bypassed to AGND with a 0.1 µF capacitor; nominal voltage VRM − VREF/2; do not load."
      },
      {
        "number": "31",
        "name": "VRP",
        "type": "passive",
        "description": "High impedance reference bypass pin, bypassed to AGND with a 0.1 µF capacitor; nominal voltage VRM + VREF/2; do not load."
      },
      {
        "number": "32",
        "name": "VRM",
        "type": "passive",
        "description": "High impedance reference bypass pin, bypassed to AGND with a 0.1 µF capacitor; nominal voltage VA/2; do not load."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Package naming differs: the hint says TQFP-32(7x7), but the datasheet and TI packaging list the part; The connection diagram on page 2 is an image with no text layer, so pin numbering was taken from the; Pin types are inferred from the datasheet descriptions: VRP/VRM/VRN are classed as passive (high-imp",
          "8/32 pins cited to the wrong page (name found elsewhere): ['16:D2@p4', '17:D3@p4', '18:D4@p4', '19:D5@p4']"
        ],
        "pages_sent": 38,
        "cost_usd": 0.072,
        "at": "2026-10-08T22:07:54"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/adc12l066",
        "pages": 38,
        "sha256": "6f1f3b8cb7bb0b75",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 32,
        "described": 32,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "adc12l066civy.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9.0,
          9.0,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "53431be61c684e9d923915676a90cb08050c23ee3f834d76a77a3b19b41422f1",
        "checked": "2026-10-08",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "adc12l066civy-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9.0,
          9.0,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "5613761f392d9ca239f7b0509c5bf079a957fff99f71e2defb87b3fbe08c5dc8",
        "checked": "2026-10-08",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}