component
ADC122S051QIMM
Public Made by Adomby adom
Texas Instruments Analog To Digital Converters (ADCs), VSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
ADC122S051QIMM
Texas Instruments · Analog To Digital Converters (ADCs) · VSSOP-8
ADC122S051QIMM from Texas Instruments, in a VSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS | input | Chip select: a falling edge on CS starts a conversion, and conversions continue as long as CS is held low. |
| 2 | VA | power_in | Positive supply, to be connected to a quiet +2.7V to +5.25V source and bypassed to GND with a 1 µF capacitor and a 0.1 µF monolithic capacitor located within 1 cm of the power pin. |
| 3 | GND | power_in | Ground return for the die. |
| 4 | IN2 | input | Analog input channel 2, which can range from 0V to VA. |
| 5 | IN1 | input | Analog input channel 1, which can range from 0V to VA. |
| 6 | DIN | input | Digital data input through which the Control Register is loaded on rising edges of SCLK; digital input voltage range is −0.3V to VA. |
| 7 | DOUT | output | Digital data output, with samples clocked out on falling edges of the SCLK pin. |
| 8 | SCLK | input | Digital clock input that directly controls the conversion and readout processes; clock frequency range is 50 kHz to 16 MHz. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VSSOP-8 |
| Category | ADC/DAC/Data Conversion |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
ADC122S051QIMM - Footprint:
Package_SO:VSSOP-8_2.3x2mm_P0.5mm - 3D model: VSSOP-8 (KiCad packages3D, STEP)
- 3D model files:
adc122s051qimm-etched.step/adc122s051qimm-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);adc122s051qimm.step/adc122s051qimm.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (29 pp, sha256
c0d986b74f1142a3, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# ADC122S051QIMM
**Texas Instruments** · Analog To Digital Converters (ADCs) · VSSOP-8
ADC122S051QIMM from Texas Instruments, in a VSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS | input | Chip select: a falling edge on CS starts a conversion, and conversions continue as long as CS is held low. |
| 2 | VA | power_in | Positive supply, to be connected to a quiet +2.7V to +5.25V source and bypassed to GND with a 1 µF capacitor and a 0.1 µF monolithic capacitor located within 1 cm of the power pin. |
| 3 | GND | power_in | Ground return for the die. |
| 4 | IN2 | input | Analog input channel 2, which can range from 0V to VA. |
| 5 | IN1 | input | Analog input channel 1, which can range from 0V to VA. |
| 6 | DIN | input | Digital data input through which the Control Register is loaded on rising edges of SCLK; digital input voltage range is −0.3V to VA. |
| 7 | DOUT | output | Digital data output, with samples clocked out on falling edges of the SCLK pin. |
| 8 | SCLK | input | Digital clock input that directly controls the conversion and readout processes; clock frequency range is 50 kHz to 16 MHz. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VSSOP-8 |
| Category | ADC/DAC/Data Conversion |
| Pins | 8 |
## CAD (KiCad official)
- Symbol: `ADC122S051QIMM`
- Footprint: `Package_SO:VSSOP-8_2.3x2mm_P0.5mm`
- 3D model: VSSOP-8 (KiCad packages3D, STEP)
- 3D model files: `adc122s051qimm-etched.step` / `adc122s051qimm-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `adc122s051qimm.step` / `adc122s051qimm.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/adc122s051q-q1) (29 pp, sha256 `c0d986b74f1142a3`, retrieved 2026-10-08, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/adc122s051qimm-datasheet.pdf)