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ADC08100CIMTCX

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Texas Instruments Analog To Digital Converters (ADC), TSSOP-24. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ADC08100CIMTCX

Texas Instruments · Analog To Digital Converters (ADC) · TSSOP-24

ADC08100CIMTCX from Texas Instruments, in a TSSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VA power_in Positive analog supply pin (+3V) requiring bypass of 0.1 µF ceramic chip capacitor per pin plus one 10 µF capacitor.
2 AGND power_in Ground return for the analog supply.
3 VRT input Analog input for the high (top) side of the reference ladder with nominal range 1.0V to VA, defining VIN conversion range with VRB.
4 VA power_in Positive analog supply pin (+3V) requiring bypass of 0.1 µF ceramic chip capacitor per pin plus one 10 µF capacitor.
5 AGND power_in Ground return for the analog supply.
6 VIN power_in Analog signal input with conversion range from VRB to VRT.
7 VIN GND power_in Reference ground for the single-ended analog input VIN.
8 AGND power_in Ground return for the analog supply.
9 VRM input Mid-point of the reference ladder requiring bypass capacitor of 0.1 µF to the analog ground plane.
10 VRB input Analog input for the low (bottom) side of the reference ladder with nominal range 0.0V to (VRT - 1.0V), defining VIN conversion range with VRT.
11 AGND power_in Ground return for the analog supply.
12 VA power_in Positive analog supply pin (+3V) requiring bypass of 0.1 µF ceramic chip capacitor per pin plus one 10 µF capacitor.
13 D0 output Conversion data digital output pin (LSB) with valid data output just after the rising edge of CLK input.
14 D1 output Conversion data digital output pin with valid data output just after the rising edge of CLK input.
15 D2 output Conversion data digital output pin with valid data output just after the rising edge of CLK input.
16 D3 output Conversion data digital output pin with valid data output just after the rising edge of CLK input.
17 DR GND power_in Ground return for the output driver supply.
18 DR VD power_in Power supply for the output drivers requiring decoupling from VA when connected.
19 D4 output Conversion data digital output pin with valid data output just after the rising edge of CLK input.
20 D5 output Conversion data digital output pin with valid data output just after the rising edge of CLK input.
21 D6 output Conversion data digital output pin with valid data output just after the rising edge of CLK input.
22 D7 output Conversion data digital output pin (MSB) with valid data output just after the rising edge of CLK input.
23 PD input Power Down input that when high places converter in Power Down mode with data output pins holding the last conversion result.
24 CLK input CMOS/TTL compatible digital clock input where VIN is sampled on the falling edge.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-24
Category Data Acquisition
Pins 24

CAD (KiCad official)

  • Symbol: ADC08100CIMTCX
  • Footprint: Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm
  • 3D model: TSSOP-24 (KiCad packages3D, STEP)
  • 3D model files: adc08100cimtcx-etched.step / adc08100cimtcx-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adc08100cimtcx.step / adc08100cimtcx.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (30 pp, sha256 b8771ba4144fdf8c, retrieved 2026-10-07, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF