component
ADAU7118ACPZRL
Public Made by Adomby adom
Analog Devices Analog To Digital Converters (ADC), LFCSP-16(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "adau7118acpzrl",
"version": "0.1.0",
"type": "component",
"description": "Analog Devices Analog To Digital Converters (ADC), LFCSP-16(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"data acquisition",
"adau7118acpzrl",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
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"adau7118acpzrl.lbr",
"docs/hero.png",
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],
"component": {
"mpn": "ADAU7118ACPZRL",
"manufacturer": "Analog Devices",
"package": "LFCSP-16(3x3)",
"pin_count": 17,
"category": "Data Acquisition",
"subcategory": "Analog To Digital Converters (ADC)",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588916379550691328",
"parts": {
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"footprint": "adau7118acpzrl.kicad_mod",
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"model_3d_step": "adau7118acpzrl-etched.step",
"model_3d_step_plain": "adau7118acpzrl.step",
"lbr": "adau7118acpzrl.lbr"
},
"distributor_links": {
"lcsc": "C654437",
"digikey": "505-ADAU7118ACPZRLTR-ND",
"mouser": "584-ADAU7118ACPZRL"
},
"distributor_check": {
"checked_at": "2026-10-19T01:58:34Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "505-ADAU7118ACPZRLTR-ND",
"status": "found"
},
"mouser": {
"pn": "584-ADAU7118ACPZRL",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "PDM_CLK0",
"type": "output",
"description": "PDM output clock 0, with output drive strength set by PDM_CLK0_DS (2.5 mA to 15 mA at 3.3 V)."
},
{
"number": "2",
"name": "PDM_DAT0",
"type": "input",
"description": "PDM input data 0 from the digital microphone(s) on this channel pair."
},
{
"number": "3",
"name": "PDM_DAT1",
"type": "input",
"description": "PDM input data 1 from the digital microphone(s) on this channel pair."
},
{
"number": "4",
"name": "PDM_CLK1",
"type": "output",
"description": "PDM output clock 1, with output drive strength set by PDM_CLK1_DS (2.5 mA to 15 mA at 3.3 V)."
},
{
"number": "5",
"name": "PDM_DAT2",
"type": "input",
"description": "PDM input data 2 from the digital microphone(s) on this channel pair."
},
{
"number": "6",
"name": "PDM_DAT3",
"type": "input",
"description": "PDM input data 3 from the digital microphone(s) on this channel pair."
},
{
"number": "7",
"name": "SCL",
"type": "input",
"description": "I2C serial clock input; the pin is open-drain and requires pull-up resistors to IOVDD."
},
{
"number": "8",
"name": "SDA",
"type": "bidirectional",
"description": "I2C serial data; the pin is open-drain and requires pull-up resistors to IOVDD."
},
{
"number": "9",
"name": "FSYNC",
"type": "input",
"description": "I2S/TDM frame sync or left/right clock, used as the slave frame sync input."
},
{
"number": "10",
"name": "BCLK",
"type": "input",
"description": "I2S/TDM bit clock input, which the device uses as a slave clock; BCLK removal automatically powers the device down."
},
{
"number": "11",
"name": "SDATA",
"type": "output",
"description": "I2S/TDM serial data output, with output drive strength set by SDATA_DS (2.5 mA to 15 mA at 3.3 V)."
},
{
"number": "12",
"name": "ADDR/CONFIG",
"type": "input",
"description": "I2C address or standalone hardware configuration selection, set by tying the pin to IOVDD, GND, through a 47 kΩ resistor, or leaving it open."
},
{
"number": "13",
"name": "EN",
"type": "input",
"description": "Chip enable; grounding this pin disables the device into low power mode, and applying IOVDD enables normal operation."
},
{
"number": "14",
"name": "DVDD",
"type": "power_in",
"description": "Internal core digital power supply, 1.10 V to 1.98 V."
},
{
"number": "15",
"name": "GND",
"type": "power_in",
"description": "Ground."
},
{
"number": "16",
"name": "IOVDD",
"type": "power_in",
"description": "Digital input/output power supply, 1.70 V to 3.63 V."
},
{
"number": "17",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Pin types for FSYNC and BCLK are inferred as inputs from the slave I2S/TDM operation stated in the d; ADDR/CONFIG type is inferred as input; the datasheet describes it as a resistor/tie configuration pi; Exposed pad is listed as EP in the datasheet (not a numbered pin); it is included as EP with power_i",
"exposed pad 17 added from the footprint",
"dropped thermal pad ['EP'] absent from footprint"
],
"pages_sent": 12,
"cost_usd": 0.06,
"at": "2026-10-19T01:58:18"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588916379550691328",
"pages": 35,
"sha256": "8b720e57686f67dd",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 17,
"described": 17,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
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"footprint": "viewers/footprint.html"
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"checked": "2026-10-19",
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}
}