component
ADAU1451WBCPZ
Public Made by Adomby adom
Analog Devices Digital Signal Processors / Controllers (DSPs/DSCs), LFCSP-72(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "adau1451wbcpz",
"version": "0.1.0",
"type": "component",
"description": "Analog Devices Digital Signal Processors / Controllers (DSPs/DSCs), LFCSP-72(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"single chip microcomputer-microcontroller",
"adau1451wbcpz",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"adau1451wbcpz.kicad_sym",
"adau1451wbcpz.kicad_mod",
"adau1451wbcpz.glb",
"adau1451wbcpz.step",
"adau1451wbcpz.lbr",
"docs/hero.png",
"docs/adau1451wbcpz-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"adau1451wbcpz-hero.glb",
"adau1451wbcpz-hero.overlay.json",
"adau1451wbcpz-etched.glb"
],
"component": {
"mpn": "ADAU1451WBCPZ",
"manufacturer": "Analog Devices",
"package": "LFCSP-72(10x10)",
"pin_count": 73,
"category": "Single Chip Microcomputer/Microcontroller",
"subcategory": "Digital Signal Processors / Controllers (DSPs/DSCs)",
"datasheet": "https://www.analog.com/media/en/technical-documentation/data-sheets/ADAU1452_1451_1450.pdf",
"parts": {
"symbol": "adau1451wbcpz.kicad_sym",
"footprint": "adau1451wbcpz.kicad_mod",
"model_3d": "adau1451wbcpz-hero.glb",
"model_3d_plain": "adau1451wbcpz-etched.glb",
"model_3d_step": "adau1451wbcpz-etched.step",
"model_3d_step_plain": "adau1451wbcpz.step",
"lbr": "adau1451wbcpz.lbr"
},
"distributor_links": {
"lcsc": "C654400",
"digikey": "505-ADAU1451WBCPZ-ND",
"mouser": "584-ADAU1451WBCPZ"
},
"distributor_check": {
"checked_at": "2026-10-28T15:51:55Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "505-ADAU1451WBCPZ-ND",
"status": "found"
},
"mouser": {
"pn": "584-ADAU1451WBCPZ",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "DGND",
"type": "power_in",
"description": "Digital and I/O ground reference; tie all DGND, AGND, and PGND pins directly together in a common ground plane."
},
{
"number": "2",
"name": "IOVDD",
"type": "power_in",
"description": "Input/output supply, 1.8 V −5% to 3.3 V +10%; bypass to pin 1 (DGND) with decoupling capacitors."
},
{
"number": "3",
"name": "VDRIVE",
"type": "passive",
"description": "Base drive bias for an external PNP pass transistor of the digital supply regulator; connect to DGND or leave floating if DVDD is supplied externally."
},
{
"number": "4",
"name": "SPDIFIN",
"type": "input",
"description": "Input to the integrated S/PDIF receiver, internally biased to IOVDD/2; leave floating when not in use and it draws approximately 0.1 mA when grounded."
},
{
"number": "5",
"name": "SPDIFOUT",
"type": "output",
"description": "Configurable output from the integrated S/PDIF transmitter, internally biased to IOVDD/2; disconnect when not in use."
},
{
"number": "6",
"name": "AGND",
"type": "power_in",
"description": "Analog ground reference; tie all DGND, AGND, and PGND pins directly together in a common ground plane."
},
{
"number": "7",
"name": "AVDD",
"type": "power_in",
"description": "Analog (auxiliary ADC) supply; must be 3.3 V ±10% and bypassed to pin 6 (AGND)."
},
{
"number": "8",
"name": "AUXADC0",
"type": "input",
"description": "Auxiliary ADC input channel 0; full-scale is reached at AVDD and the pin may be left floating when not in use."
},
{
"number": "9",
"name": "AUXADC1",
"type": "input",
"description": "Auxiliary ADC input channel 1; full-scale is reached at AVDD and the pin may be left floating when not in use."
},
{
"number": "10",
"name": "AUXADC2",
"type": "input",
"description": "Auxiliary ADC input channel 2; full-scale is reached at AVDD and the pin may be left floating when not in use."
},
{
"number": "11",
"name": "AUXADC3",
"type": "input",
"description": "Auxiliary ADC input channel 3; full-scale is reached at AVDD and the pin may be left floating when not in use."
},
{
"number": "12",
"name": "AUXADC4",
"type": "input",
"description": "Auxiliary ADC input channel 4; full-scale is reached at AVDD and the pin may be left floating when not in use."
},
{
"number": "13",
"name": "AUXADC5",
"type": "input",
"description": "Auxiliary ADC input channel 5; full-scale is reached at AVDD and the pin may be left floating when not in use."
},
{
"number": "14",
"name": "PGND",
"type": "power_in",
"description": "PLL ground reference; tie all DGND, AGND, and PGND pins directly together in a common ground plane."
},
{
"number": "15",
"name": "PVDD",
"type": "power_in",
"description": "PLL supply; must be 3.3 V ±10% and bypassed to pin 14 (PGND)."
},
{
"number": "16",
"name": "PLLFILT",
"type": "passive",
"description": "PLL filter node whose internally generated voltage is typically between 1.65 V and 2.10 V."
},
{
"number": "17",
"name": "DGND",
"type": "power_in",
"description": "Digital and I/O ground reference; tie all DGND, AGND, and PGND pins directly together in a common ground plane."
},
{
"number": "18",
"name": "IOVDD",
"type": "power_in",
"description": "Input/output supply, 1.8 V −5% to 3.3 V +10%; bypass to pin 17 (DGND) with decoupling capacitors."
},
{
"number": "19",
"name": "DGND",
"type": "power_in",
"description": "Digital and I/O ground reference; tie all DGND, AGND, and PGND pins directly together in a common ground plane."
},
{
"number": "20",
"name": "DVDD",
"type": "power_in",
"description": "Digital supply; must be 1.2 V ±5%, supplied externally or by the internal regulator with an external pass transistor, and bypassed to pin 19 (DGND)."
},
{
"number": "21",
"name": "XTALIN/MCLK",
"type": "input",
"description": "Crystal oscillator input or master clock input to the PLL; can be driven directly or used with a crystal between pins 21 and 22."
},
{
"number": "22",
"name": "XTALOUT",
"type": "output",
"description": "Crystal oscillator output for driving an external crystal; disconnect when not in use."
},
{
"number": "23",
"name": "CLKOUT",
"type": "output",
"description": "Configurable master clock output that can be set to 1x, 2x, 4x, or 8x the divided PLL input clock; disconnect when not in use."
},
{
"number": "24",
"name": "RESET",
"type": "input",
"description": "Active-low reset input; a reset is triggered on a high-to-low edge and exited on a low-to-high edge, setting all RAMs and registers to default values."
},
{
"number": "25",
"name": "DGND",
"type": "power_in",
"description": "Digital and I/O ground reference; tie all DGND, AGND, and PGND pins directly together in a common ground plane."
},
{
"number": "26",
"name": "SS_M/MP0",
"type": "bidirectional",
"description": "SPI master slave select (SS_M) or multipurpose GPIO MP0; has a nominal 250 kΩ internal pull-up and selects self-boot protocol when SELFBOOT is high at reset."
},
{
"number": "27",
"name": "MOSI_M/MP1",
"type": "output",
"description": "SPI master data output (MOSI_M) or multipurpose GPIO MP1 with an internal pull-up; disconnect when not in use."
},
{
"number": "28",
"name": "SCL_M/SCLK_M/MP2",
"type": "bidirectional",
"description": "I2C master serial clock (open collector, requires pull-up to IOVDD), SPI master clock, or multipurpose GPIO MP2; disconnect when not in use."
},
{
"number": "29",
"name": "SDA_M/MISO_M/MP3",
"type": "bidirectional",
"description": "I2C master serial data (open collector, requires pull-up to IOVDD), SPI master data input, or multipurpose GPIO MP3; disconnect when not in use."
},
{
"number": "30",
"name": "MISO/SDA",
"type": "bidirectional",
"description": "SPI slave data output or I2C slave serial data (open collector, requires pull-up to IOVDD); connect to IOVDD with 10.0 kΩ when not in use."
},
{
"number": "31",
"name": "SCLK/SCL",
"type": "input",
"description": "SPI slave serial clock or I2C slave serial clock; I2C requires a pull-up to IOVDD and 10.0 kΩ to IOVDD when not in use."
},
{
"number": "32",
"name": "MOSI/ADDR1",
"type": "input",
"description": "SPI slave data input or I2C slave address bit 2 (ADDR1), which must be hardwired to IOVDD or GND."
},
{
"number": "33",
"name": "SS/ADDR0",
"type": "input",
"description": "SPI slave select or I2C slave address bit 1 (ADDR0), which must be hardwired to IOVDD or GND."
},
{
"number": "34",
"name": "SELFBOOT",
"type": "input",
"description": "Self boot select; connecting to IOVDD initiates self boot on the next rising edge of RESET, while ground disables it, and it may be tied directly or through a 1.0 kΩ or larger resistor."
},
{
"number": "35",
"name": "DVDD",
"type": "power_in",
"description": "Digital supply; must be 1.2 V ±5%, supplied externally or by the internal regulator, and bypassed to pin 36 (DGND)."
},
{
"number": "36",
"name": "DGND",
"type": "power_in",
"description": "Digital and I/O ground reference; tie all DGND, AGND, and PGND pins directly together in a common ground plane."
},
{
"number": "37",
"name": "DGND",
"type": "power_in",
"description": "Digital and I/O ground reference; tie all DGND, AGND, and PGND pins directly together in a common ground plane."
},
{
"number": "38",
"name": "IOVDD",
"type": "power_in",
"description": "Input/output supply, 1.8 V −5% to 3.3 V +10%; bypass to pin 37 (DGND) with decoupling capacitors."
},
{
"number": "39",
"name": "LRCLK_OUT0/MP4",
"type": "bidirectional",
"description": "Serial output port 0 frame clock (master or slave direction) or multipurpose GPIO MP4; disconnect when not in use."
},
{
"number": "40",
"name": "BCLK_OUT0",
"type": "bidirectional",
"description": "Serial output port 0 bit clock, bidirectional depending on master or slave operation; disconnect when not in use."
},
{
"number": "41",
"name": "SDATA_OUT0",
"type": "output",
"description": "Serial data output port 0 carrying channels 0 to 15 in 2-, 4-, 8-, or 16-channel modes; disconnect when not in use."
},
{
"number": "42",
"name": "LRCLK_OUT1/MP5",
"type": "bidirectional",
"description": "Serial output port 1 frame clock (master or slave direction) or multipurpose GPIO MP5; disconnect when not in use."
},
{
"number": "43",
"name": "BCLK_OUT1",
"type": "bidirectional",
"description": "Serial output port 1 bit clock, bidirectional depending on master or slave operation; disconnect when not in use."
},
{
"number": "44",
"name": "SDATA_OUT1",
"type": "output",
"description": "Serial data output port 1 carrying channels 16 to 31 in 2-, 4-, 8-, or 16-channel modes; disconnect when not in use."
},
{
"number": "45",
"name": "MP6",
"type": "bidirectional",
"description": "Configurable multipurpose GPIO 6; disconnect when not in use."
},
{
"number": "46",
"name": "MP7",
"type": "bidirectional",
"description": "Configurable multipurpose GPIO 7; disconnect when not in use."
},
{
"number": "47",
"name": "LRCLK_OUT2/MP8",
"type": "bidirectional",
"description": "Serial output port 2 frame clock (master or slave direction) or multipurpose GPIO MP8; disconnect when not in use."
},
{
"number": "48",
"name": "BCLK_OUT2",
"type": "bidirectional",
"description": "Serial output port 2 bit clock, bidirectional depending on master or slave operation; disconnect when not in use."
},
{
"number": "49",
"name": "SDATA_OUT2",
"type": "output",
"description": "Serial data output port 2 carrying channels 32 to 39 in 2-, 4-, 8-channel or flexible TDM modes; disconnect when not in use."
},
{
"number": "50",
"name": "LRCLK_OUT3/MP9",
"type": "bidirectional",
"description": "Serial output port 3 frame clock (master or slave direction) or multipurpose GPIO MP9; disconnect when not in use."
},
{
"number": "51",
"name": "BCLK_OUT3",
"type": "bidirectional",
"description": "Serial output port 3 bit clock, bidirectional depending on master or slave operation; disconnect when not in use."
},
{
"number": "52",
"name": "SDATA_OUT3",
"type": "output",
"description": "Serial data output port 3 carrying channels 40 to 47 in 2-, 4-, 8-channel or flexible TDM modes; disconnect when not in use."
},
{
"number": "53",
"name": "DVDD",
"type": "power_in",
"description": "Digital supply; must be 1.2 V ±5%, supplied externally or by the internal regulator, and bypassed to pin 54 (DGND)."
},
{
"number": "54",
"name": "DGND",
"type": "power_in",
"description": "Digital and I/O ground reference; tie all DGND, AGND, and PGND pins directly together in a common ground plane."
},
{
"number": "55",
"name": "DGND",
"type": "power_in",
"description": "Digital and I/O ground reference; tie all DGND, AGND, and PGND pins directly together in a common ground plane."
},
{
"number": "56",
"name": "IOVDD",
"type": "power_in",
"description": "Input/output supply, 1.8 V −5% to 3.3 V +10%; bypass to pin 55 (DGND) with decoupling capacitors."
},
{
"number": "57",
"name": "BCLK_IN0",
"type": "bidirectional",
"description": "Serial input port 0 bit clock, bidirectional depending on master or slave operation; disconnect when not in use."
},
{
"number": "58",
"name": "LRCLK_IN0/MP10",
"type": "bidirectional",
"description": "Serial input port 0 frame clock (master or slave direction) or multipurpose GPIO MP10; disconnect when not in use."
},
{
"number": "59",
"name": "SDATA_IN0",
"type": "input",
"description": "Serial data input port 0 carrying channels 0 to 15 in 2-, 4-, 8-, or 16-channel modes; disconnect when not in use."
},
{
"number": "60",
"name": "BCLK_IN1",
"type": "bidirectional",
"description": "Serial input port 1 bit clock, bidirectional depending on master or slave operation; disconnect when not in use."
},
{
"number": "61",
"name": "LRCLK_IN1/MP11",
"type": "bidirectional",
"description": "Serial input port 1 frame clock (master or slave direction) or multipurpose GPIO MP11; disconnect when not in use."
},
{
"number": "62",
"name": "SDATA_IN1",
"type": "input",
"description": "Serial data input port 1 carrying channels 16 to 31 in 2-, 4-, 8-, or 16-channel modes; disconnect when not in use."
},
{
"number": "63",
"name": "THD_M",
"type": "passive",
"description": "Thermal diode negative input; connect to the D− pin of an external temperature sensor IC, or disconnect when not in use."
},
{
"number": "64",
"name": "THD_P",
"type": "passive",
"description": "Thermal diode positive input; connect to the D+ pin of an external temperature sensor IC, or disconnect when not in use."
},
{
"number": "65",
"name": "BCLK_IN2",
"type": "bidirectional",
"description": "Serial input port 2 bit clock, bidirectional depending on master or slave operation; disconnect when not in use."
},
{
"number": "66",
"name": "LRCLK_IN2/MP12",
"type": "bidirectional",
"description": "Serial input port 2 frame clock (master or slave direction) or multipurpose GPIO MP12; disconnect when not in use."
},
{
"number": "67",
"name": "SDATA_IN2",
"type": "input",
"description": "Serial data input port 2 carrying channels 32 to 39 in 2-, 4-, 8-channel or flexible TDM modes; disconnect when not in use."
},
{
"number": "68",
"name": "BCLK_IN3",
"type": "bidirectional",
"description": "Serial input port 3 bit clock, bidirectional depending on master or slave operation; disconnect when not in use."
},
{
"number": "69",
"name": "LRCLK_IN3/MP13",
"type": "bidirectional",
"description": "Serial input port 3 frame clock (master or slave direction) or multipurpose GPIO MP13; disconnect when not in use."
},
{
"number": "70",
"name": "SDATA_IN3",
"type": "input",
"description": "Serial data input port 3 carrying channels 40 to 47 in 2-, 4-, 8-channel or flexible TDM modes; disconnect when not in use."
},
{
"number": "71",
"name": "DVDD",
"type": "power_in",
"description": "Digital supply; must be 1.2 V ±5%, supplied externally or by the internal regulator, and bypassed to pin 72 (DGND)."
},
{
"number": "72",
"name": "DGND",
"type": "power_in",
"description": "Digital and I/O ground reference; tie all DGND, AGND, and PGND pins directly together in a common ground plane."
},
{
"number": "73",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The pin table (Table 26, Figure 12) covers the ADAU1452/ADAU1451/ADAU1450 family jointly. It is appl"
],
"pages_sent": 39,
"cost_usd": 0.0871,
"at": "2026-10-28T15:51:06"
},
"datasheet": {
"url": "https://www.analog.com/media/en/technical-documentation/data-sheets/ADAU1452_1451_1450.pdf",
"pages": 195,
"sha256": "100f2df879403c09",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 73,
"described": 73,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "adau1451wbcpz.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
10.02,
10.02,
0.9
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "4b0899f0b00e50cac8c604671781d3fe40e8852a5129d22f331a3568384eca38",
"checked": "2026-10-28",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "adau1451wbcpz-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
10.02,
10.02,
0.9
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "c5f22c222eba5cfb6e1c9b751bf0c66033ed5f30edd76f7e7784953d529c8a67",
"checked": "2026-10-28",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}