AD9838BCPZ-RL7

{
  "slug": "ad9838bcpz-rl7",
  "version": "0.1.0",
  "type": "component",
  "description": "Analog Devices Direct Digital Synthesis (DDS), LFCSP-20(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "adc-dac-data conversion",
    "ad9838bcpz-rl7",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
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    "README.md",
    "ad9838bcpz-rl7.kicad_sym",
    "ad9838bcpz-rl7.kicad_mod",
    "ad9838bcpz-rl7.glb",
    "ad9838bcpz-rl7.step",
    "ad9838bcpz-rl7.lbr",
    "docs/hero.png",
    "docs/ad9838bcpz-rl7-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "ad9838bcpz-rl7-hero.glb",
    "ad9838bcpz-rl7-hero.overlay.json",
    "ad9838bcpz-rl7-etched.glb"
  ],
  "component": {
    "mpn": "AD9838BCPZ-RL7",
    "manufacturer": "Analog Devices",
    "package": "LFCSP-20(4x4)",
    "pin_count": 21,
    "category": "ADC/DAC/Data Conversion",
    "subcategory": "Direct Digital Synthesis (DDS)",
    "datasheet": "https://www.analog.com/media/en/technical-documentation/data-sheets/AD9838.pdf",
    "parts": {
      "symbol": "ad9838bcpz-rl7.kicad_sym",
      "footprint": "ad9838bcpz-rl7.kicad_mod",
      "model_3d": "ad9838bcpz-rl7-hero.glb",
      "model_3d_plain": "ad9838bcpz-rl7-etched.glb",
      "model_3d_step": "ad9838bcpz-rl7-etched.step",
      "model_3d_step_plain": "ad9838bcpz-rl7.step",
      "lbr": "ad9838bcpz-rl7.lbr"
    },
    "distributor_links": {
      "lcsc": "C653891",
      "digikey": "505-AD9838BCPZ-RL7TR-ND",
      "mouser": "584-AD9838BCPZ-R7"
    },
    "distributor_check": {
      "checked_at": "2026-10-31T18:40:19Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "505-AD9838BCPZ-RL7TR-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "584-AD9838BCPZ-R7",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "AVDD",
        "type": "power_in",
        "description": "Positive power supply for the analog section, 2.3 V to 5.5 V, with a 0.1 µF decoupling capacitor to AGND."
      },
      {
        "number": "2",
        "name": "DVDD",
        "type": "power_in",
        "description": "Positive power supply for the digital section, 2.3 V to 5.5 V, with a 0.1 µF decoupling capacitor to DGND."
      },
      {
        "number": "3",
        "name": "CAP/2.5V",
        "type": "passive",
        "description": "2.5 V regulator output generated from DVDD when DVDD exceeds 2.7 V, needs a 100 nF typical capacitor to DGND; short to DVDD if DVDD is 2.7 V or less."
      },
      {
        "number": "4",
        "name": "DGND",
        "type": "power_in",
        "description": "Digital ground."
      },
      {
        "number": "5",
        "name": "MCLK",
        "type": "input",
        "description": "Digital clock input that sets the DDS output frequency reference, accuracy and phase noise."
      },
      {
        "number": "6",
        "name": "FSELECT",
        "type": "input",
        "description": "Frequency select input choosing FREQ0 or FREQ1 for the phase accumulator; tie to CMOS high or low when the FSEL bit is used."
      },
      {
        "number": "7",
        "name": "PSELECT",
        "type": "input",
        "description": "Phase select input choosing PHASE0 or PHASE1 to add to the phase accumulator output; tie to CMOS high or low when the PSEL bit is used."
      },
      {
        "number": "8",
        "name": "RESET",
        "type": "input",
        "description": "Active-high digital input that resets the internal registers to 0 (midscale analog output) without affecting addressable registers."
      },
      {
        "number": "9",
        "name": "SLEEP",
        "type": "input",
        "description": "Active-high digital input that powers down the DAC when high, same function as the SLEEP12 control bit."
      },
      {
        "number": "10",
        "name": "SDATA",
        "type": "input",
        "description": "Serial data input for the 16-bit serial data word."
      },
      {
        "number": "11",
        "name": "SCLK",
        "type": "input",
        "description": "Serial clock input; data is clocked in on each falling edge of SCLK."
      },
      {
        "number": "12",
        "name": "FSYNC",
        "type": "input",
        "description": "Active-low frame synchronization control input; taking it low indicates a new word is being loaded."
      },
      {
        "number": "13",
        "name": "SIGN BIT OUT",
        "type": "output",
        "description": "Logic output providing the comparator output or the NCO MSB, enabled by the OPBITEN bit and selected by the SIGN/PIB bit."
      },
      {
        "number": "14",
        "name": "VIN",
        "type": "power_in",
        "description": "Comparator input used to generate a square wave from the filtered sinusoidal DAC output."
      },
      {
        "number": "15",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground."
      },
      {
        "number": "16",
        "name": "IOUT",
        "type": "output",
        "description": "High-impedance current output; connect a nominal 200 Ω load resistor to AGND, with a 20 pF capacitor to AGND recommended."
      },
      {
        "number": "17",
        "name": "IOUTB",
        "type": "output",
        "description": "Complementary current output; tie to AGND through a 200 Ω load resistor or directly to AGND."
      },
      {
        "number": "18",
        "name": "FSADJUST",
        "type": "passive",
        "description": "Full-scale adjust; RSET (6.8 kΩ typical) to AGND sets full-scale current via IOUT FULL SCALE = 18 × FSADJUST/RSET, FSADJUST = 1.14 V nominal."
      },
      {
        "number": "19",
        "name": "REFOUT",
        "type": "output",
        "description": "Voltage reference output of the internal 1.20 V reference."
      },
      {
        "number": "20",
        "name": "COMP",
        "type": "passive",
        "description": "DAC bias pin used for decoupling the DAC bias voltage."
      },
      {
        "number": "21",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-sonnet-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Exposed pad is labeled EP in the pin table, not numbered; ground connection per datasheet. CAP/2.5V,"
        ],
        "pages_sent": 16,
        "cost_usd": 0.1585,
        "at": "2026-10-31T18:40:00"
      },
      "datasheet": {
        "url": "https://www.analog.com/media/en/technical-documentation/data-sheets/AD9838.pdf",
        "pages": 32,
        "sha256": "fd7a8033e90ea2cb",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 21,
        "described": 21,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
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        "file": "ad9838bcpz-rl7.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          4.0,
          4.0,
          0.77
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "c9476a1612023de37f27b4972110ab6ac6dc0eaf5ac48957a2e1c497650082a5",
        "checked": "2026-10-31",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ad9838bcpz-rl7-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "31471c534006ca9e9b0415c2bb0e99f817caa89a945a4e87db6c1c709091cafb",
        "checked": "2026-10-31",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ],
    "package_dims": {
      "package_code": "CP-20-10",
      "source_page": 30,
      "D": {
        "nom_mm": 4.0,
        "range_mm": [
          3.9,
          4.1
        ]
      },
      "E1": {
        "nom_mm": 4.0,
        "range_mm": [
          3.9,
          4.1
        ]
      },
      "e": {
        "nom_mm": 0.5,
        "range_mm": [
          null,
          null
        ]
      },
      "A": {
        "nom_mm": 0.75,
        "range_mm": [
          0.7,
          0.8
        ]
      },
      "source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
      "model_check": {
        "file": "ad9838bcpz-rl7.step",
        "verdict": "PASS",
        "reasons": [
          "height within the datasheet's package drawing"
        ],
        "by": "factory/package_fit.py"
      }
    }
  }
}