component
AD9518-0ABCPZ
Public Made by Adomby adom
Analog Devices Clock Generators / Frequency Synthesizers / PLL, LFCSP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"brief": "Analog Devices Clock Generators / Frequency Synthesizers / PLL, LFCSP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
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"mpn": "AD9518-0ABCPZ",
"manufacturer": "Analog Devices",
"package": "LFCSP-48(7x7)",
"pin_count": 49,
"category": "RTC/Clock Chip",
"subcategory": "Clock Generators / Frequency Synthesizers / PLL",
"datasheet": "https://www.analog.com/media/en/technical-documentation/data-sheets/AD9518-0.pdf",
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"digikey": "505-AD9518-0ABCPZ-ND",
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"pins": [
{
"number": "1",
"name": "REFMON",
"type": "output",
"description": "Reference Monitor output with multiple selectable functions set by Register 0x01B; CMOS level at 3.3 V."
},
{
"number": "2",
"name": "LD",
"type": "output",
"description": "Lock Detect output with multiple selectable functions set by Register 0x01A; CMOS level at 3.3 V."
},
{
"number": "3",
"name": "VCP",
"type": "power_in",
"description": "Charge pump supply, which must satisfy VS ≤ VCP ≤ 5.0 V and is usually 3.3 V but should be 5 V when a 5 V external VCXO is used."
},
{
"number": "4",
"name": "CP",
"type": "output",
"description": "Charge pump output that connects to the external loop filter."
},
{
"number": "5",
"name": "STATUS",
"type": "output",
"description": "Status output with multiple selectable functions set by Register 0x017; CMOS level at 3.3 V."
},
{
"number": "6",
"name": "REF_SEL",
"type": "input",
"description": "Reference select input that chooses REF1 when low and REF2 when high, with an internal 30 kΩ pull-down."
},
{
"number": "7",
"name": "SYNC",
"type": "input",
"description": "Active-low input for manual synchronization and manual holdover, with an internal 30 kΩ pull-up."
},
{
"number": "8",
"name": "LF",
"type": "passive",
"description": "Loop filter input connected internally to the VCO control voltage node, with 31 pF of internal capacitance to ground that may affect loop filter design at large loop bandwidths."
},
{
"number": "9",
"name": "BYPASS",
"type": "passive",
"description": "Bypasses the LDO to ground through an external capacitor."
},
{
"number": "10",
"name": "VS",
"type": "power_in",
"description": "3.3 V power pin."
},
{
"number": "11",
"name": "CLK",
"type": "input",
"description": "Complement of the self-biased differential clock input for the clock distribution section; may be left floating when the internal VCO is used."
},
{
"number": "12",
"name": "CLK",
"type": "input",
"description": "Self-biased differential clock input for the clock distribution section; may be left floating when the internal VCO is used."
},
{
"number": "13",
"name": "SCLK",
"type": "input",
"description": "Serial control port data clock input; write data is registered on its rising edge, with an internal 30 kΩ pull-down; CMOS at 3.3 V."
},
{
"number": "14",
"name": "CS",
"type": "input",
"description": "Serial control port chip select, active low, with an internal 30 kΩ pull-up."
},
{
"number": "15",
"name": "SDO",
"type": "output",
"description": "Unidirectional serial data output used only in unidirectional I/O mode for reading back data."
},
{
"number": "16",
"name": "SDIO",
"type": "bidirectional",
"description": "Serial control port bidirectional serial data input and output pin; default I/O mode."
},
{
"number": "17",
"name": "RESET",
"type": "input",
"description": "Chip reset input, active low, with an internal 30 kΩ pull-up."
},
{
"number": "18",
"name": "PD",
"type": "input",
"description": "Chip power-down input, active low, with an internal 30 kΩ pull-up."
},
{
"number": "19",
"name": "OUT4",
"type": "output",
"description": "One side of the differential LVPECL output pair OUT4, which operates to 1.6 GHz."
},
{
"number": "20",
"name": "OUT4",
"type": "output",
"description": "Complementary side of the differential LVPECL output pair OUT4, which operates to 1.6 GHz."
},
{
"number": "21",
"name": "VS_LVPECL",
"type": "power_in",
"description": "LVPECL output power pin, supplied from 2.5 V to 3.3 V nominal."
},
{
"number": "22",
"name": "OUT5",
"type": "output",
"description": "One side of the differential LVPECL output pair OUT5, which operates to 1.6 GHz."
},
{
"number": "23",
"name": "OUT5",
"type": "output",
"description": "Complementary side of the differential LVPECL output pair OUT5, which operates to 1.6 GHz."
},
{
"number": "24",
"name": "VS",
"type": "power_in",
"description": "3.3 V power pin."
},
{
"number": "25",
"name": "VS",
"type": "power_in",
"description": "3.3 V power pin."
},
{
"number": "26",
"name": "VS",
"type": "power_in",
"description": "3.3 V power pin."
},
{
"number": "27",
"name": "GND",
"type": "power_in",
"description": "Ground pin; the exposed paddle on the package bottom must also be connected to ground for proper operation."
},
{
"number": "28",
"name": "OUT3",
"type": "output",
"description": "One side of the differential LVPECL output pair OUT3, which operates to 1.6 GHz."
},
{
"number": "29",
"name": "OUT3",
"type": "output",
"description": "Complementary side of the differential LVPECL output pair OUT3, which operates to 1.6 GHz."
},
{
"number": "30",
"name": "VS_LVPECL",
"type": "power_in",
"description": "LVPECL output power pin, supplied from 2.5 V to 3.3 V nominal."
},
{
"number": "31",
"name": "VS_LVPECL",
"type": "power_in",
"description": "LVPECL output power pin, supplied from 2.5 V to 3.3 V nominal."
},
{
"number": "32",
"name": "OUT2",
"type": "output",
"description": "One side of the differential LVPECL output pair OUT2, which operates to 1.6 GHz."
},
{
"number": "33",
"name": "OUT2",
"type": "output",
"description": "Complementary side of the differential LVPECL output pair OUT2, which operates to 1.6 GHz."
},
{
"number": "34",
"name": "GND",
"type": "power_in",
"description": "Ground pin; the exposed paddle on the package bottom must also be connected to ground for proper operation."
},
{
"number": "35",
"name": "VS",
"type": "power_in",
"description": "3.3 V power pin."
},
{
"number": "36",
"name": "NC",
"type": "unconnected",
"description": "No connection."
},
{
"number": "37",
"name": "VS",
"type": "power_in",
"description": "3.3 V power pin."
},
{
"number": "38",
"name": "OUT1",
"type": "output",
"description": "One side of the differential LVPECL output pair OUT1, which operates to 1.6 GHz."
},
{
"number": "39",
"name": "OUT1",
"type": "output",
"description": "Complementary side of the differential LVPECL output pair OUT1, which operates to 1.6 GHz."
},
{
"number": "40",
"name": "VS_LVPECL",
"type": "power_in",
"description": "LVPECL output power pin, supplied from 2.5 V to 3.3 V nominal."
},
{
"number": "41",
"name": "OUT0",
"type": "output",
"description": "One side of the differential LVPECL output pair OUT0, which operates to 1.6 GHz."
},
{
"number": "42",
"name": "OUT0",
"type": "output",
"description": "Complementary side of the differential LVPECL output pair OUT0, which operates to 1.6 GHz."
},
{
"number": "43",
"name": "VS",
"type": "power_in",
"description": "3.3 V power pin."
},
{
"number": "44",
"name": "RSET",
"type": "passive",
"description": "Resistor connection that sets internal bias currents; nominal value is 4.12 kΩ."
},
{
"number": "45",
"name": "VS",
"type": "power_in",
"description": "3.3 V power pin."
},
{
"number": "46",
"name": "CPRSET",
"type": "passive",
"description": "Resistor connection that sets the charge pump current range; nominal value is 5.1 kΩ."
},
{
"number": "47",
"name": "REFIN (REF2)",
"type": "input",
"description": "Complement of the self-biased differential PLL reference input; alternatively a single-ended input for REF2."
},
{
"number": "48",
"name": "REFIN (REF1)",
"type": "input",
"description": "Self-biased differential PLL reference input; alternatively a single-ended input for REF1."
},
{
"number": "49",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
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"metadata": {
"specs": {
"Manufacturer": "Analog Devices",
"Package": "LFCSP-48(7x7)",
"Category": "RTC/Clock Chip",
"Pins": "49"
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"characteristics": {
"version": 1,
"source": "datasheet",
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"rows": [
{
"name": "Supply voltage VS",
"symbol": "VS",
"kind": "recommended_operating",
"unit": "V",
"min": 3.135,
"typ": 3.3,
"max": 3.465,
"conditions": "3.3 V ± 5%",
"source_page": 4,
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{
"name": "LVPECL supply voltage",
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"kind": "recommended_operating",
"unit": "V",
"min": 2.375,
"typ": null,
"max": null,
"conditions": "Nominally 2.5 V to 3.3 V ± 5%",
"source_page": 4,
"source": "datasheet"
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{
"name": "Charge pump supply voltage",
"symbol": "VCP",
"kind": "recommended_operating",
"unit": "V",
"min": null,
"typ": null,
"max": 5.25,
"conditions": "Nominally 3.3 V to 5.0 V ± 5%",
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"source": "datasheet"
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{
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"min": 0.5,
"typ": null,
"max": null,
"conditions": "VCP ≤ VS when using internal VCO",
"source_page": 4,
"source": "datasheet"
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{
"name": "On-chip VCO frequency range",
"symbol": "",
"kind": "electrical",
"unit": "MHz",
"min": 2550,
"typ": null,
"max": 2950,
"conditions": "See Figure 11",
"source_page": 4,
"source": "datasheet"
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{
"name": "VCO gain",
"symbol": "KVCO",
"kind": "electrical",
"unit": "MHz/V",
"min": null,
"typ": 50,
"max": null,
"conditions": "See Figure 6",
"source_page": 4,
"source": "datasheet"
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{
"name": "Reference input frequency (differential)",
"symbol": "",
"kind": "electrical",
"unit": "MHz",
"min": 0,
"typ": null,
"max": 250,
"conditions": "Differential mode; frequencies below about 1 MHz should be dc-coupled",
"source_page": 4,
"source": "datasheet"
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{
"name": "Reference input frequency (AC-coupled single-ended)",
"symbol": "",
"kind": "electrical",
"unit": "MHz",
"min": 20,
"typ": null,
"max": 250,
"conditions": "Dual single-ended mode; slew rate > 50 V/μs",
"source_page": 4,
"source": "datasheet"
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{
"name": "Reference input frequency (DC-coupled single-ended)",
"symbol": "",
"kind": "electrical",
"unit": "MHz",
"min": 0,
"typ": null,
"max": 250,
"conditions": "Dual single-ended mode; slew rate > 50 V/μs; CMOS levels",
"source_page": 4,
"source": "datasheet"
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{
"name": "PFD input frequency",
"symbol": "",
"kind": "electrical",
"unit": "MHz",
"min": null,
"typ": null,
"max": 100,
"conditions": "Antibacklash pulse width = 1.3 ns, 2.9 ns",
"source_page": 4,
"source": "datasheet"
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{
"name": "PFD input frequency",
"symbol": "",
"kind": "electrical",
"unit": "MHz",
"min": null,
"typ": null,
"max": 45,
"conditions": "Antibacklash pulse width = 6.0 ns",
"source_page": 4,
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{
"name": "Charge pump sink/source current high value",
"symbol": "ICP",
"kind": "electrical",
"unit": "mA",
"min": null,
"typ": 4.8,
"max": null,
"conditions": "With CPRSET = 5.1 kΩ",
"source_page": 5,
"source": "datasheet"
},
{
"name": "Charge pump sink/source current low value",
"symbol": "ICP",
"kind": "electrical",
"unit": "mA",
"min": null,
"typ": 0.6,
"max": null,
"conditions": "",
"source_page": 5,
"source": "datasheet"
},
{
"name": "Clock input frequency (VCO divider)",
"symbol": "",
"kind": "electrical",
"unit": "GHz",
"min": 0,
"typ": null,
"max": 2.4,
"conditions": "High frequency distribution (VCO divider)",
"source_page": 6,
"source": "datasheet"
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{
"name": "Clock input frequency (VCO divider bypassed)",
"symbol": "",
"kind": "electrical",
"unit": "GHz",
"min": 0,
"typ": null,
"max": 1.6,
"conditions": "Distribution only (VCO divider bypassed)",
"source_page": 6,
"source": "datasheet"
},
{
"name": "Clock input common-mode voltage",
"symbol": "VCM",
"kind": "electrical",
"unit": "V",
"min": 1.3,
"typ": 1.57,
"max": 1.8,
"conditions": "Self-biased; enables ac coupling",
"source_page": 6,
"source": "datasheet"
},
{
"name": "LVPECL output differential voltage",
"symbol": "VOD",
"kind": "electrical",
"unit": "mV",
"min": 550,
"typ": 790,
"max": 980,
"conditions": "Default amplitude setting; driver not toggling; termination 50 Ω to VS − 2 V",
"source_page": 6,
"source": "datasheet"
},
{
"name": "LVPECL output frequency, maximum",
"symbol": "",
"kind": "electrical",
"unit": "MHz",
"min": null,
"typ": null,
"max": 2950,
"conditions": "Using direct to output",
"source_page": 6,
"source": "datasheet"
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{
"name": "LVPECL output rise time",
"symbol": "tRP",
"kind": "timing",
"unit": "ps",
"min": 70,
"typ": null,
"max": 180,
"conditions": "20% to 80%, measured differentially; termination 50 Ω to VS − 2 V",
"source_page": 6,
"source": "datasheet"
},
{
"name": "LVPECL output fall time",
"symbol": "tFP",
"kind": "timing",
"unit": "ps",
"min": 70,
"typ": null,
"max": 180,
"conditions": "80% to 20%, measured differentially; termination 50 Ω to VS − 2 V",
"source_page": 6,
"source": "datasheet"
},
{
"name": "Output skew, LVPECL outputs sharing same divider",
"symbol": "",
"kind": "timing",
"unit": "ps",
"min": 5,
"typ": null,
"max": 15,
"conditions": "Difference between any two similar delay paths at same voltage and temperature",
"source_page": 6,
"source": "datasheet"
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{
"name": "Output skew, LVPECL outputs on different dividers",
"symbol": "",
"kind": "timing",
"unit": "ps",
"min": 13,
"typ": null,
"max": 40,
"conditions": "Difference between any two similar delay paths at same voltage and temperature",
"source_page": 6,
"source": "datasheet"
},
{
"name": "Power-on default power dissipation",
"symbol": "",
"kind": "electrical",
"unit": "W",
"min": null,
"typ": 0.76,
"max": 1,
"conditions": "No clock; no programming; default register values; excludes external resistors",
"source_page": 11,
"source": "datasheet"
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{
"name": "Full operation power dissipation",
"symbol": "",
"kind": "electrical",
"unit": "W",
"min": null,
"typ": 1.1,
"max": 1.7,
"conditions": "PLL on; internal VCO = 2750 MHz; VCO divider = 2; all channel dividers on; six LVPECL outputs at 687.5 MHz",
"source_page": 11,
"source": "datasheet"
},
{
"name": "Power-down power dissipation",
"symbol": "",
"kind": "electrical",
"unit": "mW",
"min": null,
"typ": 75,
"max": 185,
"conditions": "PD pin pulled low; excludes power in terminations",
"source_page": 11,
"source": "datasheet"
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{
"name": "Power-down maximum sleep power dissipation",
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