component
AD9517-1ABCPZ-RL7
Public Made by Adomby adom
Analog Devices Clock Generators / Frequency Synthesizers / PLL, LFCSP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "ad9517-1abcpz-rl7",
"version": "0.1.0",
"type": "component",
"description": "Analog Devices Clock Generators / Frequency Synthesizers / PLL, LFCSP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"rtc-clock chip",
"ad9517-1abcpz-rl7",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
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"ad9517-1abcpz-rl7.step",
"ad9517-1abcpz-rl7.lbr",
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"docs/ad9517-1abcpz-rl7-datasheet.pdf",
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],
"component": {
"mpn": "AD9517-1ABCPZ-RL7",
"manufacturer": "Analog Devices",
"package": "LFCSP-48(7x7)",
"pin_count": 49,
"category": "RTC/Clock Chip",
"subcategory": "Clock Generators / Frequency Synthesizers / PLL",
"datasheet": "https://www.analog.com/media/en/technical-documentation/data-sheets/AD9517-1.pdf",
"parts": {
"symbol": "ad9517-1abcpz-rl7.kicad_sym",
"footprint": "ad9517-1abcpz-rl7.kicad_mod",
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"model_3d_step": "ad9517-1abcpz-rl7-etched.step",
"model_3d_step_plain": "ad9517-1abcpz-rl7.step",
"lbr": "ad9517-1abcpz-rl7.lbr"
},
"distributor_links": {
"lcsc": "C653508",
"digikey": "505-AD9517-1ABCPZ-RL7TR-ND",
"mouser": "584-AD9517-1ABCPZ-R7"
},
"distributor_check": {
"checked_at": "2026-10-30T18:22:14Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "505-AD9517-1ABCPZ-RL7TR-ND",
"status": "found"
},
"mouser": {
"pn": "584-AD9517-1ABCPZ-R7",
"status": "found",
"lifecycle": "Restricted Availability"
}
},
"pins": [
{
"number": "1",
"name": "REFMON",
"type": "output",
"description": "Reference monitor output on 3.3 V CMOS with multiple selectable outputs set by Register 0x01B."
},
{
"number": "2",
"name": "LD",
"type": "output",
"description": "Lock detect output on 3.3 V CMOS with multiple selectable outputs set by Register 0x01A."
},
{
"number": "3",
"name": "VCP",
"type": "power_in",
"description": "Power supply for the charge pump, which must satisfy VS ≤ VCP ≤ 5.0 V; it is usually 3.3 V but should be 5 V if a 5 V external VCXO is used."
},
{
"number": "4",
"name": "CP",
"type": "output",
"description": "Charge pump output on 3.3 V CMOS that connects to the external loop filter."
},
{
"number": "5",
"name": "STATUS",
"type": "output",
"description": "Status output on 3.3 V CMOS with multiple selectable outputs set by Register 0x017."
},
{
"number": "6",
"name": "REF_SEL",
"type": "input",
"description": "Reference select input on 3.3 V CMOS that selects REF1 when low and REF2 when high, with an internal 30 kΩ pull-down resistor."
},
{
"number": "7",
"name": "SYNC",
"type": "input",
"description": "Active-low 3.3 V CMOS input that initiates a manual synchronization and manual holdover, with an internal 30 kΩ pull-up resistor."
},
{
"number": "8",
"name": "LF",
"type": "input",
"description": "Loop filter input that connects internally to the VCO control voltage node and has 31 pF of internal capacitance to ground, which may influence loop filter design for large loop bandwidths."
},
{
"number": "9",
"name": "BYPASS",
"type": "passive",
"description": "Used for bypassing the LDO to ground with a capacitor."
},
{
"number": "10",
"name": "VS",
"type": "power_in",
"description": "3.3 V power pin."
},
{
"number": "11",
"name": "CLK",
"type": "input",
"description": "Along with CLK, the self-biased differential input for the clock distribution section; it can be left floating if the internal VCO is used."
},
{
"number": "12",
"name": "CLK",
"type": "input",
"description": "Along with CLK, the self-biased differential input for the clock distribution section; it can be left floating if the internal VCO is used."
},
{
"number": "13",
"name": "SCLK",
"type": "input",
"description": "Serial control port data clock signal on 3.3 V CMOS."
},
{
"number": "14",
"name": "CS",
"type": "input",
"description": "Active-low serial control port chip select on 3.3 V CMOS, with an internal 30 kΩ pull-up resistor."
},
{
"number": "15",
"name": "SDO",
"type": "output",
"description": "Unidirectional serial control port data output on 3.3 V CMOS."
},
{
"number": "16",
"name": "SDIO",
"type": "bidirectional",
"description": "Serial control port bidirectional serial data input/output on 3.3 V CMOS, also usable as a unidirectional serial data input."
},
{
"number": "17",
"name": "RESET",
"type": "input",
"description": "Active-low chip reset on 3.3 V CMOS, with an internal 30 kΩ pull-up resistor."
},
{
"number": "18",
"name": "PD",
"type": "input",
"description": "Active-low chip power-down on 3.3 V CMOS, with an internal 30 kΩ pull-up resistor."
},
{
"number": "19",
"name": "OUT2",
"type": "output",
"description": "LVPECL output; one side of a differential LVPECL output."
},
{
"number": "20",
"name": "OUT2",
"type": "output",
"description": "LVPECL output; one side of a differential LVPECL output."
},
{
"number": "21",
"name": "VS_LVPECL",
"type": "power_in",
"description": "Extended voltage 2.5 V to 3.3 V LVPECL power pin."
},
{
"number": "22",
"name": "OUT3",
"type": "output",
"description": "LVPECL output; one side of a differential LVPECL output."
},
{
"number": "23",
"name": "OUT3",
"type": "output",
"description": "LVPECL output; one side of a differential LVPECL output."
},
{
"number": "24",
"name": "VS",
"type": "power_in",
"description": "3.3 V power pin."
},
{
"number": "25",
"name": "VS",
"type": "power_in",
"description": "3.3 V power pin."
},
{
"number": "26",
"name": "OUT6 (OUT6A)",
"type": "output",
"description": "LVDS/CMOS output; one side of a differential LVDS output or a single-ended CMOS output."
},
{
"number": "27",
"name": "OUT6 (OUT6B)",
"type": "output",
"description": "LVDS/CMOS output; one side of a differential LVDS output or a single-ended CMOS output."
},
{
"number": "28",
"name": "OUT7 (OUT7A)",
"type": "output",
"description": "LVDS/CMOS output; one side of a differential LVDS output or a single-ended CMOS output."
},
{
"number": "29",
"name": "OUT7 (OUT7B)",
"type": "output",
"description": "LVDS/CMOS output; one side of a differential LVDS output or a single-ended CMOS output."
},
{
"number": "30",
"name": "VS",
"type": "power_in",
"description": "3.3 V power pin."
},
{
"number": "31",
"name": "VS",
"type": "power_in",
"description": "3.3 V power pin."
},
{
"number": "32",
"name": "OUT5 (OUT5B)",
"type": "output",
"description": "LVDS/CMOS output; one side of a differential LVDS output or a single-ended CMOS output."
},
{
"number": "33",
"name": "OUT5 (OUT5A)",
"type": "output",
"description": "LVDS/CMOS output; one side of a differential LVDS output or a single-ended CMOS output."
},
{
"number": "34",
"name": "OUT4 (OUT4B)",
"type": "output",
"description": "LVDS/CMOS output; one side of a differential LVDS output or a single-ended CMOS output."
},
{
"number": "35",
"name": "OUT4 (OUT4A)",
"type": "output",
"description": "LVDS/CMOS output; one side of a differential LVDS output or a single-ended CMOS output."
},
{
"number": "36",
"name": "VS",
"type": "power_in",
"description": "3.3 V power pin."
},
{
"number": "37",
"name": "VS",
"type": "power_in",
"description": "3.3 V power pin."
},
{
"number": "38",
"name": "OUT1",
"type": "output",
"description": "LVPECL output; one side of a differential LVPECL output."
},
{
"number": "39",
"name": "OUT1",
"type": "output",
"description": "LVPECL output; one side of a differential LVPECL output."
},
{
"number": "40",
"name": "VS_LVPECL",
"type": "power_in",
"description": "Extended voltage 2.5 V to 3.3 V LVPECL power pin."
},
{
"number": "41",
"name": "OUT0",
"type": "output",
"description": "LVPECL output; one side of a differential LVPECL output."
},
{
"number": "42",
"name": "OUT0",
"type": "output",
"description": "LVPECL output; one side of a differential LVPECL output."
},
{
"number": "43",
"name": "VS",
"type": "power_in",
"description": "3.3 V power pin."
},
{
"number": "44",
"name": "RSET",
"type": "passive",
"description": "Resistor connected here sets internal bias currents; nominal value is 4.12 kΩ."
},
{
"number": "45",
"name": "VS",
"type": "power_in",
"description": "3.3 V power pin."
},
{
"number": "46",
"name": "CPRSET",
"type": "passive",
"description": "Resistor connected here sets the charge pump current range; nominal value is 5.1 kΩ."
},
{
"number": "47",
"name": "REFIN (REF2)",
"type": "input",
"description": "Along with REFIN, the self-biased differential input for the PLL reference; alternatively, a single-ended input for REF2."
},
{
"number": "48",
"name": "REFIN (REF1)",
"type": "input",
"description": "Along with REFIN, the self-biased differential input for the PLL reference; alternatively, a single-ended input for REF1."
},
{
"number": "49",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The text extraction dropped the overbar on complementary names. Pins 9, 11/12, 19/20, 22/23, 38/39, ; The datasheet labels BYPASS, RSET and CPRSET as type O. These are passive connections (an LDO bypass; The LVDS/CMOS outputs OUT4 to OUT7 are shown as (OUTxA)/(OUTxB) in the pinout. The datasheet describ",
"exposed pad 49 added from the footprint",
"dropped thermal pad ['EP'] absent from footprint"
],
"pages_sent": 16,
"cost_usd": 0.1403,
"at": "2026-10-30T18:22:00"
},
"datasheet": {
"url": "https://www.analog.com/media/en/technical-documentation/data-sheets/AD9517-1.pdf",
"pages": 80,
"sha256": "e35c86d638f76dc7",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 49,
"described": 49,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
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"footprint": "viewers/footprint.html"
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"models_3d": [
{
"file": "ad9517-1abcpz-rl7.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
7.0,
7.0,
0.77
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "f2b38b0b4bf967c77e683e8d4599608b9f0503055ec535b93c4ebb5d0163e916",
"checked": "2026-10-30",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "ad9517-1abcpz-rl7-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
7.0,
7.0,
0.77
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "3772b20a9774ff4f8b7d33ef83ae3bf3070866e041a5b8d2a114d73b5a3dda9a",
"checked": "2026-10-30",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
],
"package_dims": {
"package_code": "CP-48-9",
"source_page": 79,
"D": {
"nom_mm": 7.0,
"range_mm": [
6.9,
7.1
]
},
"E1": {
"nom_mm": 7.0,
"range_mm": [
6.9,
7.1
]
},
"e": {
"nom_mm": 0.5,
"range_mm": [
null,
null
]
},
"A": {
"nom_mm": 0.75,
"range_mm": [
0.7,
0.8
]
},
"source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
"model_check": {
"file": "ad9517-1abcpz-rl7.step",
"verdict": "PASS",
"reasons": [
"height within the datasheet's package drawing"
],
"by": "factory/package_fit.py"
}
}
}
}