component
AD9512BCPZ-REEL7
Public Made by Adomby adom
Analog Devices Clock Generators / Frequency Synthesizers / PLL, LFCSP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"schema_version": 1,
"type": "component",
"slug": "ad9512bcpz-reel7",
"title": "AD9512BCPZ-REEL7",
"brief": "Analog Devices Clock Generators / Frequency Synthesizers / PLL, LFCSP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"rtc-clock chip",
"ad9512bcpz-reel7",
"factory-2.0.0",
"extractor-text"
],
"component": {
"mpn": "AD9512BCPZ-REEL7",
"manufacturer": "Analog Devices",
"package": "LFCSP-48(7x7)",
"pin_count": 49,
"category": "RTC/Clock Chip",
"subcategory": "Clock Generators / Frequency Synthesizers / PLL",
"datasheet": "https://www.analog.com/media/en/technical-documentation/data-sheets/AD9512.pdf",
"parts": {
"symbol": "ad9512bcpz-reel7.kicad_sym",
"footprint": "ad9512bcpz-reel7.kicad_mod",
"model_3d": "ad9512bcpz-reel7-hero.glb",
"model_3d_plain": "ad9512bcpz-reel7-etched.glb",
"model_3d_step": "ad9512bcpz-reel7-etched.step",
"model_3d_step_plain": "ad9512bcpz-reel7.step",
"lbr": "ad9512bcpz-reel7.lbr"
},
"distributor_links": {
"lcsc": "C653489",
"digikey": "505-AD9512BCPZ-REEL7TR-ND",
"mouser": "584-AD9512BCPZ-R7"
},
"distributor_check": {
"checked_at": "2026-10-28T16:00:26Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "505-AD9512BCPZ-REEL7TR-ND",
"status": "found"
},
"mouser": {
"pn": "584-AD9512BCPZ-R7",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "DSYNC",
"type": "input",
"description": "Detect Sync input used for multichip synchronization."
},
{
"number": "2",
"name": "DSYNCB",
"type": "input",
"description": "Detect Sync Complement input used for multichip synchronization."
},
{
"number": "3",
"name": "VS",
"type": "power_in",
"description": "Power supply, 3.3 V nominal (VS = 3.3 V ±5%; absolute maximum -0.3 V to +3.6 V with respect to GND)."
},
{
"number": "4",
"name": "VS",
"type": "power_in",
"description": "Power supply, 3.3 V nominal (VS = 3.3 V ±5%; absolute maximum -0.3 V to +3.6 V with respect to GND)."
},
{
"number": "5",
"name": "DNC",
"type": "unconnected",
"description": "Do Not Connect; leave this pin unconnected."
},
{
"number": "6",
"name": "VS",
"type": "power_in",
"description": "Power supply, 3.3 V nominal (VS = 3.3 V ±5%; absolute maximum -0.3 V to +3.6 V with respect to GND)."
},
{
"number": "7",
"name": "CLK2",
"type": "input",
"description": "Clock input 2 (differential or single-ended, up to 1.6 GHz input frequency)."
},
{
"number": "8",
"name": "CLK2B",
"type": "input",
"description": "Complementary clock input 2, used in conjunction with CLK2 (up to 1.6 GHz input frequency)."
},
{
"number": "9",
"name": "VS",
"type": "power_in",
"description": "Power supply, 3.3 V nominal (VS = 3.3 V ±5%; absolute maximum -0.3 V to +3.6 V with respect to GND)."
},
{
"number": "10",
"name": "CLK1",
"type": "input",
"description": "Clock input 1 (differential or single-ended, up to 1.6 GHz input frequency)."
},
{
"number": "11",
"name": "CLK1B",
"type": "input",
"description": "Complementary clock input 1, used in conjunction with CLK1 (up to 1.6 GHz input frequency)."
},
{
"number": "12",
"name": "FUNCTION",
"type": "input",
"description": "Multipurpose input programmable as reset (RESETB), sync (SYNCB), or power-down (PDB) pin."
},
{
"number": "13",
"name": "STATUS",
"type": "output",
"description": "Output used to monitor the status of multichip synchronization (low indicates in sync)."
},
{
"number": "14",
"name": "SCLK",
"type": "input",
"description": "Serial data clock for the serial control port, internally pulled down by a 30 kΩ resistor to ground."
},
{
"number": "15",
"name": "SDIO",
"type": "bidirectional",
"description": "Serial data I/O; input only by default, or bidirectional when enabled via register 00h<7> = 1b."
},
{
"number": "16",
"name": "SDO",
"type": "output",
"description": "Serial data output used for readback in unidirectional I/O mode (default)."
},
{
"number": "17",
"name": "CSB",
"type": "input",
"description": "Serial port chip select, active low; must not be left NC or tied low and is internally pulled down by a 30 kΩ resistor."
},
{
"number": "18",
"name": "VS",
"type": "power_in",
"description": "Power supply, 3.3 V nominal (VS = 3.3 V ±5%; absolute maximum -0.3 V to +3.6 V with respect to GND)."
},
{
"number": "19",
"name": "GND",
"type": "power_in",
"description": "Ground; connect to the system ground plane."
},
{
"number": "20",
"name": "OUT2B",
"type": "output",
"description": "Complementary LVPECL output 2 (1.2 GHz maximum output frequency)."
},
{
"number": "21",
"name": "OUT2",
"type": "output",
"description": "LVPECL output 2 (1.2 GHz maximum output frequency)."
},
{
"number": "22",
"name": "VS",
"type": "power_in",
"description": "Power supply, 3.3 V nominal (VS = 3.3 V ±5%; absolute maximum -0.3 V to +3.6 V with respect to GND)."
},
{
"number": "23",
"name": "VS",
"type": "power_in",
"description": "Power supply, 3.3 V nominal (VS = 3.3 V ±5%; absolute maximum -0.3 V to +3.6 V with respect to GND)."
},
{
"number": "24",
"name": "GND",
"type": "power_in",
"description": "Ground; connect to the system ground plane."
},
{
"number": "25",
"name": "VS",
"type": "power_in",
"description": "Power supply, 3.3 V nominal (VS = 3.3 V ±5%; absolute maximum -0.3 V to +3.6 V with respect to GND)."
},
{
"number": "26",
"name": "OUT1B",
"type": "output",
"description": "Complementary LVPECL output 1 (1.2 GHz maximum output frequency)."
},
{
"number": "27",
"name": "OUT1",
"type": "output",
"description": "LVPECL output 1 (1.2 GHz maximum output frequency)."
},
{
"number": "28",
"name": "VS",
"type": "power_in",
"description": "Power supply, 3.3 V nominal (VS = 3.3 V ±5%; absolute maximum -0.3 V to +3.6 V with respect to GND)."
},
{
"number": "29",
"name": "VS",
"type": "power_in",
"description": "Power supply, 3.3 V nominal (VS = 3.3 V ±5%; absolute maximum -0.3 V to +3.6 V with respect to GND)."
},
{
"number": "30",
"name": "OUT4B",
"type": "output",
"description": "Complementary LVDS/inverted CMOS output 4 (LVDS 800 MHz or CMOS 250 MHz); OUT4 includes a delay block."
},
{
"number": "31",
"name": "OUT4",
"type": "output",
"description": "LVDS/CMOS output 4 (LVDS 800 MHz or CMOS 250 MHz); includes a delay block."
},
{
"number": "32",
"name": "VS",
"type": "power_in",
"description": "Power supply, 3.3 V nominal (VS = 3.3 V ±5%; absolute maximum -0.3 V to +3.6 V with respect to GND)."
},
{
"number": "33",
"name": "VS",
"type": "power_in",
"description": "Power supply, 3.3 V nominal (VS = 3.3 V ±5%; absolute maximum -0.3 V to +3.6 V with respect to GND)."
},
{
"number": "34",
"name": "OUT3B",
"type": "output",
"description": "Complementary LVDS/inverted CMOS output 3 (LVDS 800 MHz or CMOS 250 MHz)."
},
{
"number": "35",
"name": "OUT3",
"type": "output",
"description": "LVDS/CMOS output 3 (LVDS 800 MHz or CMOS 250 MHz)."
},
{
"number": "36",
"name": "VS",
"type": "power_in",
"description": "Power supply, 3.3 V nominal (VS = 3.3 V ±5%; absolute maximum -0.3 V to +3.6 V with respect to GND)."
},
{
"number": "37",
"name": "GND",
"type": "power_in",
"description": "Ground; connect to the system ground plane."
},
{
"number": "38",
"name": "GND",
"type": "power_in",
"description": "Ground; connect to the system ground plane."
},
{
"number": "39",
"name": "VS",
"type": "power_in",
"description": "Power supply, 3.3 V nominal (VS = 3.3 V ±5%; absolute maximum -0.3 V to +3.6 V with respect to GND)."
},
{
"number": "40",
"name": "VS",
"type": "power_in",
"description": "Power supply, 3.3 V nominal (VS = 3.3 V ±5%; absolute maximum -0.3 V to +3.6 V with respect to GND)."
},
{
"number": "41",
"name": "OUT0B",
"type": "output",
"description": "Complementary LVPECL output 0 (1.2 GHz maximum output frequency)."
},
{
"number": "42",
"name": "OUT0",
"type": "output",
"description": "LVPECL output 0 (1.2 GHz maximum output frequency)."
},
{
"number": "43",
"name": "GND",
"type": "power_in",
"description": "Ground; connect to the system ground plane."
},
{
"number": "44",
"name": "VS",
"type": "power_in",
"description": "Power supply, 3.3 V nominal (VS = 3.3 V ±5%; absolute maximum -0.3 V to +3.6 V with respect to GND)."
},
{
"number": "45",
"name": "RSET",
"type": "passive",
"description": "Current set resistor to ground; nominal value 4.12 kΩ."
},
{
"number": "46",
"name": "GND",
"type": "power_in",
"description": "Ground; connect to the system ground plane."
},
{
"number": "47",
"name": "VS",
"type": "power_in",
"description": "Power supply, 3.3 V nominal (VS = 3.3 V ±5%; absolute maximum -0.3 V to +3.6 V with respect to GND)."
},
{
"number": "48",
"name": "VS",
"type": "power_in",
"description": "Power supply, 3.3 V nominal (VS = 3.3 V ±5%; absolute maximum -0.3 V to +3.6 V with respect to GND)."
},
{
"number": "49",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [],
"pages_sent": 14,
"cost_usd": 0.0347,
"at": "2026-10-28T15:59:59"
},
"datasheet": {
"url": "https://www.analog.com/media/en/technical-documentation/data-sheets/AD9512.pdf",
"pages": 48,
"sha256": "d1b41ee2be9937bf",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 49,
"described": 49,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "ad9512bcpz-reel7.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
7,
7,
0.77
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "f2b38b0b4bf967c77e683e8d4599608b9f0503055ec535b93c4ebb5d0163e916",
"checked": "2026-10-28",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "ad9512bcpz-reel7-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
7,
7,
0.77
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "5a60c96ea0dff802cae36b940b1dcdbbec26545640c393ca63921280b0385c04",
"checked": "2026-10-28",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "Analog Devices",
"Package": "LFCSP-48(7x7)",
"Category": "RTC/Clock Chip",
"Pins": "49"
},
"characteristics": {
"version": 1,
"source": "datasheet",
"datasheet_sha256": "d1b41ee2be9937bf50952042c13a38c4b7ad08d557005cbe7b4d85088af8145e",
"rows": [
{
"name": "Supply voltage tolerance",
"symbol": "VS",
"kind": "tolerance",
"unit": "%",
"min": -5,
"typ": null,
"max": 5,
"conditions": "3.3 V ± 5% supply",
"source_page": 43,
"source": "datasheet"
},
{
"name": "Ambient operating temperature",
"symbol": "TA",
"kind": "recommended_operating",
"unit": "°C",
"min": -40,
"typ": null,
"max": 85,
"conditions": "Min/Max over full VS and TA variation",
"source_page": 4,
"source": "datasheet"
},
{
"name": "Supply voltage absolute maximum",
"symbol": "VS",
"kind": "absolute_maximum",
"unit": "V",
"min": -0.3,
"typ": null,
"max": 3.6,
"conditions": "With respect to GND",
"source_page": 16,
"source": "datasheet"
},
{
"name": "CLK1 to CLK1B differential absolute maximum",
"symbol": "",
"kind": "absolute_maximum",
"unit": "V",
"min": -1.2,
"typ": null,
"max": 1.2,
"conditions": "CLK1 with respect to CLK1B",
"source_page": 16,
"source": "datasheet"
},
{
"name": "CLK2 to CLK2B differential absolute maximum",
"symbol": "",
"kind": "absolute_maximum",
"unit": "V",
"min": -1.2,
"typ": null,
"max": 1.2,
"conditions": "CLK2 with respect to CLK2B",
"source_page": 16,
"source": "datasheet"
},
{
"name": "Junction temperature",
"symbol": "TJ",
"kind": "absolute_maximum",
"unit": "°C",
"min": null,
"typ": null,
"max": 150,
"conditions": "",
"source_page": 16,
"source": "datasheet"
},
{
"name": "Storage temperature",
"symbol": "TSTG",
"kind": "absolute_maximum",
"unit": "°C",
"min": -65,
"typ": null,
"max": 150,
"conditions": "",
"source_page": 16,
"source": "datasheet"
},
{
"name": "Lead temperature",
"symbol": "",
"kind": "absolute_maximum",
"unit": "°C",
"min": null,
"typ": null,
"max": 300,
"conditions": "10 sec",
"source_page": 16,
"source": "datasheet"
},
{
"name": "Thermal resistance junction to ambient",
"symbol": "θJA",
"kind": "thermal",
"unit": "°C/W",
"min": null,
"typ": 28.5,
"max": null,
"conditions": "48-lead LFCSP, 4-layer board in still air, EIA/JESD51-7",
"source_page": 16,
"source": "datasheet"
},
{
"name": "Input frequency",
"symbol": "",
"kind": "electrical",
"unit": "GHz",
"min": 0,
"typ": null,
"max": 1.6,
"conditions": "CLK1, CLK2 clock inputs",
"source_page": 4,
"source": "datasheet"
},
{
"name": "Input sensitivity",
"symbol": "",
"kind": "electrical",
"unit": "mV p-p",
"min": 150,
"typ": null,
"max": null,
"conditions": "Jitter performance can be improved with higher slew rates",
"source_page": 4,
"source": "datasheet"
},
{
"name": "Input common-mode voltage",
"symbol": "VCM",
"kind": "electrical",
"unit": "V",
"min": 1.5,
"typ": 1.6,
"max": 1.7,
"conditions": "Self-biased; enables ac coupling",
"source_page": 4,
"source": "datasheet"
},
{
"name": "Input common-mode range",
"symbol": "VCMR",
"kind": "electrical",
"unit": "V",
"min": 1.3,
"typ": null,
"max": 1.8,
"conditions": "With 200 mV p-p signal applied; dc-coupled",
"source_page": 4,
"source": "datasheet"
},
{
"name": "Input resistance",
"symbol": "",
"kind": "electrical",
"unit": "kΩ",
"min": 4,
"typ": 4.8,
"max": 5.6,
"conditions": "Self-biased",
"source_page": 4,
"source": "datasheet"
},
{
"name": "LVPECL differential output voltage",
"symbol": "VOD",
"kind": "electrical",
"unit": "mV",
"min": 660,
"typ": 810,
"max": 965,
"conditions": "Termination = 50 Ω to VS − 2 V; output level 3Dh (3Eh) (3Fh)<3:2> = 10b",
"source_page": 4,
"source": "datasheet"
},
{
"name": "LVDS differential output voltage",
"symbol": "VOD",
"kind": "electrical",
"unit": "mV",
"min": 250,
"typ": 360,
"max": 450,
"conditions": "Termination = 100 Ω differential; default output level 40h (41h)<2:1> = 01b; 3.5 mA termination current",
"source_page": 4,
"source": "datasheet"
},
{
"name": "LVDS output offset voltage",
"symbol": "VOS",
"kind": "electrical",
"unit": "V",
"min": 1.125,
"typ": 1.23,
"max": 1.375,
"conditions": "Termination = 100 Ω differential; 3.5 mA termination current",
"source_page": 4,
"source": "datasheet"
},
{
"name": "LVDS short-circuit current",
"symbol": "ISA, ISB",
"kind": "electrical",
"unit": "mA",
"min": 14,
"typ": 24,
"max": null,
"conditions": "Output shorted to GND",
"source_page": 4,
"source": "datasheet"
},
{
"name": "LVPECL output rise time",
"symbol": "tRP",
"kind": "timing",
"unit": "ps",
"min": 130,
"typ": 180,
"max": null,
"conditions": "20% to 80%, measured differentially",
"source_page": 5,
"source": "datasheet"
},
{
"name": "LVPECL output fall time",
"symbol": "tFP",
"kind": "timing",
"unit": "ps",
"min": 130,
"typ": 180,
"max": null,
"conditions": "80% to 20%, measured differentially",
"source_page": 5,
"source": "datasheet"
},
{
"name": "LVDS output rise time",
"symbol": "tRL",
"kind": "timing",
"unit": "ps",
"min": 200,
"typ": 350,
"max": null,
"conditions": "20% to 80%, measured differentially",
"source_page": 5,
"source": "datasheet"
},
{
"name": "LVDS output fall time",
"symbol": "tFL",
"kind": "timing",
"unit": "ps",
"min": 210,
"typ": 350,
"max": null,
"conditions": "80% to 20%, measured differentially",
"source_page": 5,
"source": "datasheet"
},
{
"name": "CMOS output rise time",
"symbol": "tRC",
"kind": "timing",
"unit": "ps",
"min": 681,
"typ": 865,
"max": null,
"conditions": "20% to 80%; CLOAD = 3 pF",
"source_page": 5,
"source": "datasheet"
},
{
"name": "CMOS output fall time",
"symbol": "tFC",
"kind": "timing",
"unit": "ps",
"min": 646,
"typ": 992,
"max": null,
"conditions": "80% to 20%; CLOAD = 3 pF",
"source_page": 5,
"source": "datasheet"
},
{
"name": "LVPECL propagation delay, divide bypass",
"symbol": "tPECL",
"kind": "timing",
"unit": "ps",
"min": 335,
"typ": 490,
"max": 635,
"conditions": "CLK-to-LVPECL OUT, divide = bypass",
"source_page": 5,
"source": "datasheet"
},
{
"name": "LVPECL propagation delay, divide 2 to 32",
"symbol": "tPECL",
"kind": "timing",
"unit": "ps",
"min": 375,
"typ": 545,
"max": 695,
"conditions": "CLK-to-LVPECL OUT, divide = 2 − 32",
"source_page": 5,
"source": "datasheet"
},
{
"name": "LVDS propagation delay, divide bypass",
"symbol": "tLVDS",
"kind": "timing",
"unit": "ns",
"min": 0.99,
"typ": 1.33,
"max": 1.59,
"conditions": "CLK-to-LVDS OUT, delay off on OUT4, divide = bypass",
"source_page": 5,
"source": "datasheet"
},
{
"name": "LVDS propagation delay, divide 2 to 32",
"symbol": "tLVDS",
"kind": "timing",
"unit": "ns",
"min": 1.04,
"typ": 1.38,
"max": 1.64,
"conditions": "CLK-to-LVDS OUT, delay off on OUT4, divide = 2 − 32",
"source_page": 5,
"source": "datasheet"
},
{
"name": "CMOS propagation delay, divide bypass",
"symbol": "tCMOS",
"kind": "timing",
"unit": "ns",
"min": 1.02,
"typ": 1.39,
"max": 1.71,
"conditions": "CLK-to-CMOS OUT, delay off on OUT4, divide = bypass",
"source_page": 5,
"source": "datasheet"
},
{
"name": "CMOS propagation delay, divide 2 to 32",
"symbol": "tCMOS",
"kind": "timing",
"unit": "ns",
"min": 1.07,
"typ": 1.44,
"max": 1.76,
"conditions": "CLK-to-CMOS OUT, delay off on OUT4, divide = 2 − 32",
"source_page": 5,
"source": "datasheet"
},
{
"name": "Output skew OUT1 to OUT0 (LVPECL)",
"symbol": "tSKP2",
"kind": "timing",
"unit": "ps",
"min": 70,
"typ": 100,
"max": 140,
"conditions": "Same part",
"source_page": 5,
"source": "datasheet"
},
{
"name": "Delay adjust shortest range zero scale",
"symbol": "",
"kind": "timing",
"unit": "ns",
"min": 0.05,
"typ": 0.36,
"max": 0.68,
"conditions": "OUT4 shortest delay range, 36h<5:1> 00000b",
"source_page": 6,
"source": "datasheet"
},
{
"name": "Delay adjust shortest range full scale",
"symbol": "",
"kind": "timing",
"unit": "ns",
"min": 0.72,
"typ": 1.12,
"max": 1.51,
"conditions": "OUT4 shortest delay range, 36h<5:1> 11111b",
"source_page": 6,
"source": "datasheet"
},
{
"name": "Delay adjust longest range zero scale",
"symbol": "",
"kind": "timing",
"unit": "ns",
"min": 0.2,
"typ": 0.57,
"max": 0.95,
"conditions": "OUT4 longest delay range, 36h<5:1> 00000b",
"source_page": 6,
"source": "datasheet"
},
{
"name": "Delay adjust longest range full scale",
"symbol": "",
"kind": "timing",
"unit": "ns",
"min": 9,
"typ": 10.2,
"max": 11.6,
"conditions": "OUT4 longest delay range, 36h<5:1> 11111b",
"source_page": 6,
"source": "datasheet"
},
{
"name": "Serial port input logic 1 voltage",
"symbol": "",
"kind": "electrical",
"unit": "V",
"min": 2,
"typ": null,
"max": null,
"conditions": "CSB, SCLK, SDIO inputs",
"source_page": 12,
"source": "datasheet"
},
{
"name": "Serial port input logic 0 voltage",
"symbol": "",
"kind": "electrical",
"unit": "V",
"min": null,
"typ": null,
"max": 0.8,
"conditions": "CSB, SCLK, SDIO inputs",
"source_page": 12,
"source": "datasheet"
},
{
"name": "Serial port output logic 1 voltage",
"symbol": "",
"kind": "electrical",
"unit": "V",
"min": 2.7,
"typ": null,
"max": null,
"conditions": "SDIO, SDO outputs",
"source_page": 12,
"source": "datasheet"
},
{
"name": "Serial port output logic 0 voltage",
"symbol": "",
"kind": "electrical",
"unit": "V",
"min": null,
"typ": null,
"max": 0.4,
"conditions": "SDIO, SDO outputs",
"source_page": 12,
"source": "datasheet"
},
{
"name": "Serial port clock rate",
"symbol": "1/tSCLK",
"kind": "timing",
"unit": "MHz",
"min": null,
"typ": null,
"max": 25,
"conditions": "SCLK",
"source_page": 12,
"source": "datasheet"
},
{
"name": "Power-up default mode power dissipation",
"symbol": "",
"kind": "electrical",
"unit": "mW",
"min": 550,
"typ": 600,
"max": null,
"conditions": "Power-up default state; does not include power dissipated in output load resistors; no clock",
"source_page": 14,
"source": "datasheet"
},
{
"name": "Full sleep power-down power",
"symbol": "",
"kind": "electrical",
"unit": "mW",
"min": 35,
"typ": 60,
"max": null,
"conditions": "Maximum sleep: 0Ah<1:0> = 01b and 58h<4> = 1b; does not include power in terminations",
"source_page": 14,
"source": "datasheet"
},
{
"name": "Power-down (PDB) power",
"symbol": "",
"kind": "electrical",
"unit": "mW",
"min": 60,
"typ": 80,
"max": null,
"conditions": "FUNCTION pin PDB operation, 58h<6:5> = 11b; PDB pulled low; does not include power in terminations",
"source_page": 14,
"source": "datasheet"
}
]
}
},
"variants": [],
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"ad9512bcpz-reel7"
],
"discovery_pitch": "AD9512BCPZ-REEL7 (Analog Devices) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
"author": {
"name": "Ray",
"email": "[email protected]"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"ad9512bcpz-reel7.kicad_sym",
"ad9512bcpz-reel7.kicad_mod",
"ad9512bcpz-reel7.glb",
"ad9512bcpz-reel7.step",
"ad9512bcpz-reel7.lbr",
"docs/hero.png",
"docs/ad9512bcpz-reel7-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"ad9512bcpz-reel7-hero.glb",
"ad9512bcpz-reel7-hero.overlay.json",
"ad9512bcpz-reel7-etched.glb"
],
"visibility": {
"public": true
}
}