AD7928BRUZ-REEL7

{
  "slug": "ad7928bruz-reel7",
  "version": "0.1.0",
  "type": "component",
  "description": "Analog Devices Analog To Digital Converters (ADC), TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "data acquisition",
    "ad7928bruz-reel7",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "ad7928bruz-reel7.kicad_sym",
    "ad7928bruz-reel7.kicad_mod",
    "ad7928bruz-reel7.glb",
    "ad7928bruz-reel7.step",
    "ad7928bruz-reel7.lbr",
    "docs/hero.png",
    "docs/ad7928bruz-reel7-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "ad7928bruz-reel7-hero.glb",
    "ad7928bruz-reel7-hero.overlay.json",
    "ad7928bruz-reel7-etched.glb"
  ],
  "component": {
    "mpn": "AD7928BRUZ-REEL7",
    "manufacturer": "Analog Devices",
    "package": "TSSOP-20",
    "pin_count": 20,
    "category": "Data Acquisition",
    "subcategory": "Analog To Digital Converters (ADC)",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588881511852883968",
    "parts": {
      "symbol": "ad7928bruz-reel7.kicad_sym",
      "footprint": "ad7928bruz-reel7.kicad_mod",
      "model_3d": "ad7928bruz-reel7-hero.glb",
      "model_3d_plain": "ad7928bruz-reel7-etched.glb",
      "model_3d_step": "ad7928bruz-reel7-etched.step",
      "model_3d_step_plain": "ad7928bruz-reel7.step",
      "lbr": "ad7928bruz-reel7.lbr"
    },
    "distributor_links": {
      "lcsc": "C183018",
      "digikey": "AD7928BRUZ-REEL7TR-ND",
      "mouser": "584-AD7928BRUZ-R7"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T03:42:05Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "AD7928BRUZ-REEL7TR-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "584-AD7928BRUZ-R7",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "SCLK",
        "type": "input",
        "description": "Serial clock logic input that provides the serial clock for accessing data and is also the master clock for the conversion process."
      },
      {
        "number": "2",
        "name": "DIN",
        "type": "input",
        "description": "Data in logic input; data written to the control register is clocked in on the falling edge of SCLK."
      },
      {
        "number": "3",
        "name": "CS",
        "type": "input",
        "description": "Active-low chip select logic input that initiates conversions, samples the input on its falling edge, and frames the serial data transfer."
      },
      {
        "number": "4",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground reference point for all analog circuitry; all AGND pins should be connected together."
      },
      {
        "number": "5",
        "name": "AVDD",
        "type": "power_in",
        "description": "Analog power supply input, 2.7 V to 5.25 V; for the 0 V to 2 × REFIN input range AVDD must be 4.75 V to 5.25 V."
      },
      {
        "number": "6",
        "name": "AVDD",
        "type": "power_in",
        "description": "Analog power supply input, 2.7 V to 5.25 V; for the 0 V to 2 × REFIN input range AVDD must be 4.75 V to 5.25 V."
      },
      {
        "number": "7",
        "name": "REFIN",
        "type": "input",
        "description": "External reference input that must be driven with 2.5 V ±1% for specified performance."
      },
      {
        "number": "8",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground reference point for all analog circuitry; all AGND pins should be connected together."
      },
      {
        "number": "9",
        "name": "VIN7",
        "type": "input",
        "description": "Single-ended analog input channel 7 multiplexed into the track-and-hold; input range 0 V to REFIN or 0 V to 2 × REFIN, and unused inputs must be tied to AGND."
      },
      {
        "number": "10",
        "name": "VIN6",
        "type": "input",
        "description": "Single-ended analog input channel 6 multiplexed into the track-and-hold; input range 0 V to REFIN or 0 V to 2 × REFIN, and unused inputs must be tied to AGND."
      },
      {
        "number": "11",
        "name": "VIN5",
        "type": "input",
        "description": "Single-ended analog input channel 5 multiplexed into the track-and-hold; input range 0 V to REFIN or 0 V to 2 × REFIN, and unused inputs must be tied to AGND."
      },
      {
        "number": "12",
        "name": "VIN4",
        "type": "input",
        "description": "Single-ended analog input channel 4 multiplexed into the track-and-hold; input range 0 V to REFIN or 0 V to 2 × REFIN, and unused inputs must be tied to AGND."
      },
      {
        "number": "13",
        "name": "VIN3",
        "type": "input",
        "description": "Single-ended analog input channel 3 multiplexed into the track-and-hold; input range 0 V to REFIN or 0 V to 2 × REFIN, and unused inputs must be tied to AGND."
      },
      {
        "number": "14",
        "name": "VIN2",
        "type": "input",
        "description": "Single-ended analog input channel 2 multiplexed into the track-and-hold; input range 0 V to REFIN or 0 V to 2 × REFIN, and unused inputs must be tied to AGND."
      },
      {
        "number": "15",
        "name": "VIN1",
        "type": "input",
        "description": "Single-ended analog input channel 1 multiplexed into the track-and-hold; input range 0 V to REFIN or 0 V to 2 × REFIN, and unused inputs must be tied to AGND."
      },
      {
        "number": "16",
        "name": "VIN0",
        "type": "input",
        "description": "Single-ended analog input channel 0 multiplexed into the track-and-hold; input range 0 V to REFIN or 0 V to 2 × REFIN, and unused inputs must be tied to AGND."
      },
      {
        "number": "17",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground reference point for all analog circuitry; all AGND pins should be connected together."
      },
      {
        "number": "18",
        "name": "DOUT",
        "type": "output",
        "description": "Serial data output that clocks out the conversion result MSB first on the falling edge of SCLK, preceded by a leading zero and three channel address bits."
      },
      {
        "number": "19",
        "name": "VDRIVE",
        "type": "power_in",
        "description": "Logic power supply input that sets the voltage levels of the serial interface, independent of AVDD."
      },
      {
        "number": "20",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground reference point for all analog circuitry; all AGND pins should be connected together."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The pin figure text extraction on page 11 is garbled (pin numbers and labels are interleaved). Pin a; KiCad ERC has no analog pin class, so the VIN0-VIN7 and REFIN pins were typed as input. Adjust if th"
        ],
        "pages_sent": 7,
        "cost_usd": 0.0668,
        "at": "2026-10-18T03:39:48"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588881511852883968",
        "pages": 28,
        "sha256": "8d3a9b226094694a",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 20,
        "described": 20,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "ad7928bruz-reel7.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          6.5,
          1.2
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "97339947f3a7196470ec2f1d9f9b92bb2fc2ab66ad53be0cf105192585ef3c9a",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ad7928bruz-reel7-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          6.5,
          1.2
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "4d242bc281bd07e1c9f8544b4a05346f382cf9379fc6d56f730da91a8642b96a",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}