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Ray Set visibility: public 8c05cb4 5d ago
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  "slug": "ad7782bruz",
  "title": "AD7782BRUZ",
  "brief": "Analog Devices Analog To Digital Converters (ADCs), TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
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    "mpn": "AD7782BRUZ",
    "manufacturer": "Analog Devices",
    "package": "TSSOP-16",
    "pin_count": 16,
    "category": "Data Converters",
    "subcategory": "Analog To Digital Converters (ADCs)",
    "datasheet": "https://www.analog.com/media/en/technical-documentation/data-sheets/AD7782.pdf",
    "parts": {
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    "distributor_links": {
      "lcsc": "C651551",
      "digikey": "AD7782BRUZ-ND",
      "mouser": "584-AD7782BRUZ"
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      "source": "Component Ocean /api/assign-pns",
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      "mouser": {
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    },
    "pins": [
      {
        "number": "1",
        "name": "XTAL1",
        "type": "input",
        "description": "Input to the 32.768 kHz crystal oscillator inverter, used with a 32.768 kHz watch crystal."
      },
      {
        "number": "2",
        "name": "REFIN(+)",
        "type": "input",
        "description": "Positive reference input that can lie anywhere between VDD and GND +1 V, with a nominal REFIN(+) - REFIN(-) of 2.5 V and operation from 1 V to VDD."
      },
      {
        "number": "3",
        "name": "REFIN(–)",
        "type": "input",
        "description": "Negative reference input that can lie anywhere between GND and VDD - 1 V."
      },
      {
        "number": "4",
        "name": "AIN1(+)",
        "type": "input",
        "description": "Positive terminal of the fully-differential analog input pair AIN1(+)/AIN1(-), with absolute input voltage limits of GND + 100 mV to VDD - 100 mV."
      },
      {
        "number": "5",
        "name": "AIN1(–)",
        "type": "input",
        "description": "Negative terminal of the fully-differential analog input pair AIN1(+)/AIN1(-), with absolute input voltage limits of GND + 100 mV to VDD - 100 mV."
      },
      {
        "number": "6",
        "name": "AIN2(+)",
        "type": "input",
        "description": "Positive terminal of the fully-differential analog input pair AIN2(+)/AIN2(-), with absolute input voltage limits of GND + 100 mV to VDD - 100 mV."
      },
      {
        "number": "7",
        "name": "AIN2(–)",
        "type": "input",
        "description": "Negative terminal of the fully-differential analog input pair AIN2(+)/AIN2(-), with absolute input voltage limits of GND + 100 mV to VDD - 100 mV."
      },
      {
        "number": "8",
        "name": "CH1/CH2",
        "type": "input",
        "description": "Channel select logic input where CH1/CH2 = 0 selects AIN1(+)/AIN1(-) and CH1/CH2 = 1 selects AIN2(+)/AIN2(-)."
      },
      {
        "number": "9",
        "name": "RANGE",
        "type": "input",
        "description": "Logic input configuring the PGA input range, where RANGE = 0 gives ±160 mV and RANGE = 1 gives ±2.56 V for a +2.5 V reference."
      },
      {
        "number": "10",
        "name": "SCLK",
        "type": "bidirectional",
        "description": "Serial clock that is an output in master mode with one SCLK period equal to one XTAL period, and a Schmitt-triggered input in slave mode."
      },
      {
        "number": "11",
        "name": "CS",
        "type": "input",
        "description": "Active-low chip select which, when taken high, aborts the conversion, three-states DOUT and SCLK, and places the part in standby mode."
      },
      {
        "number": "12",
        "name": "DOUT/RDY",
        "type": "output",
        "description": "Serial data output and data-ready output that goes low when valid data is available and outputs data on the falling SCLK edge, valid on the rising edge."
      },
      {
        "number": "13",
        "name": "MODE",
        "type": "input",
        "description": "Selects the operating mode, with MODE = 0 for master mode and MODE = 1 for slave mode."
      },
      {
        "number": "14",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference point for the AD7782."
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      {
        "number": "15",
        "name": "VDD",
        "type": "power_in",
        "description": "Supply voltage of 3 V or 5 V nominal, specified for 2.7 V to 3.6 V or 4.75 V to 5.25 V."
      },
      {
        "number": "16",
        "name": "XTAL2",
        "type": "output",
        "description": "Output from the 32.768 kHz crystal oscillator inverter."
      }
    ],
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        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
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          "1/16 pin names appear NOWHERE in the datasheet text: ['1:XTAL1@p6']"
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        "pages_sent": 12,
        "cost_usd": 0.0209,
        "at": "2026-10-28T15:49:02"
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        "pages": 12,
        "sha256": "0738d9e5e0c618b2",
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  "metadata": {
    "specs": {
      "Manufacturer": "Analog Devices",
      "Package": "TSSOP-16",
      "Category": "Data Converters",
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          "name": "XTAL1 Input Low Voltage",
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          "symbol": "VOL",
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          "symbol": "VOH",
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          "conditions": "VDD = 5 V, ISOURCE = 200 µA",
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          "name": "Floating-State Leakage Current",
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          "name": "Power Supply Voltage (3 V)",
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          "name": "Power Supply Voltage (5 V)",
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          "max": 24,
          "conditions": "VDD = 5 V",
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          "name": "CH1/CH2 Select to CS Setup Time",
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