AD7771BCPZ

{
  "schema_version": 1,
  "type": "component",
  "slug": "ad7771bcpz",
  "title": "AD7771BCPZ",
  "brief": "Analog Devices Analog To Digital Converters (ADCs), LFCSP-64(9x9). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "adc-dac-data conversion",
    "ad7771bcpz",
    "factory-2.0.0",
    "extractor-text"
  ],
  "component": {
    "mpn": "AD7771BCPZ",
    "manufacturer": "Analog Devices",
    "package": "LFCSP-64(9x9)",
    "pin_count": 65,
    "category": "ADC/DAC/Data Conversion",
    "subcategory": "Analog To Digital Converters (ADCs)",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590903756085280768",
    "parts": {
      "symbol": "ad7771bcpz.kicad_sym",
      "footprint": "ad7771bcpz.kicad_mod",
      "model_3d": "ad7771bcpz-etched.glb",
      "model_3d_plain": "ad7771bcpz.glb",
      "model_3d_step": "ad7771bcpz-etched.step",
      "model_3d_step_plain": "ad7771bcpz.step",
      "lbr": "ad7771bcpz.lbr"
    },
    "distributor_links": {
      "lcsc": "C578517"
    },
    "pins": [
      {
        "number": "1",
        "name": "AIN0−",
        "type": "input",
        "description": "Analog Input Channel 0, Negative, accepts differential or single-ended signals."
      },
      {
        "number": "2",
        "name": "AIN0+",
        "type": "input",
        "description": "Analog Input Channel 0, Positive, accepts differential or single-ended signals."
      },
      {
        "number": "3",
        "name": "AIN1−",
        "type": "input",
        "description": "Analog Input Channel 1, Negative, accepts differential or single-ended signals."
      },
      {
        "number": "4",
        "name": "AIN1+",
        "type": "input",
        "description": "Analog Input Channel 1, Positive, accepts differential or single-ended signals."
      },
      {
        "number": "5",
        "name": "AVSS1A",
        "type": "power_in",
        "description": "Negative Front-End Analog Supply for Channels 0-3, typical −1.65 V dual supply or AGND single supply; connect all AVSSx pins to same potential."
      },
      {
        "number": "6",
        "name": "AVDD1A",
        "type": "power_in",
        "description": "Positive Front-End Analog Supply for Channels 0-3, typical AVSSx + 3.3 V; connect to AVDD1B."
      },
      {
        "number": "7",
        "name": "REF1−",
        "type": "input",
        "description": "Negative Reference Input 1 for Channels 0-3, typical AVSSx; connect all REFx− pins to same potential."
      },
      {
        "number": "8",
        "name": "REF1+",
        "type": "input",
        "description": "Positive Reference Input 1 for Channels 0-3, typical REF1− + 2.5 V."
      },
      {
        "number": "9",
        "name": "AIN2−",
        "type": "input",
        "description": "Analog Input Channel 2, Negative, accepts differential or single-ended signals."
      },
      {
        "number": "10",
        "name": "AIN2+",
        "type": "input",
        "description": "Analog Input Channel 2, Positive, accepts differential or single-ended signals."
      },
      {
        "number": "11",
        "name": "AIN3−",
        "type": "input",
        "description": "Analog Input Channel 3, Negative, accepts differential or single-ended signals."
      },
      {
        "number": "12",
        "name": "AIN3+",
        "type": "input",
        "description": "Analog Input Channel 3, Positive, accepts differential or single-ended signals."
      },
      {
        "number": "13",
        "name": "MODE0/GPIO0",
        "type": "bidirectional",
        "description": "Mode 0 input in Pin Control Mode; configurable General-Purpose Input/Output 0 in SPI Control Mode; if unused, connect to DGND or IOVDD."
      },
      {
        "number": "14",
        "name": "MODE1/GPIO1",
        "type": "bidirectional",
        "description": "Mode 1 input in Pin Control Mode; configurable General-Purpose Input/Output 1 in SPI Control Mode; if unused, connect to DGND or IOVDD."
      },
      {
        "number": "15",
        "name": "MODE2/GPIO2",
        "type": "bidirectional",
        "description": "Mode 2 input in Pin Control Mode; configurable General-Purpose Input/Output 2 in SPI Control Mode; if unused, connect to DGND or IOVDD."
      },
      {
        "number": "16",
        "name": "MODE3/ALERT",
        "type": "bidirectional",
        "description": "Mode 3 input in Pin Control Mode; Alert Output in SPI Control Mode."
      },
      {
        "number": "17",
        "name": "CONVST_SAR",
        "type": "input",
        "description": "Σ-Δ Output Interface Selection Pin in Pin Control Mode; SAR ADC conversion start trigger in SPI Control Mode."
      },
      {
        "number": "18",
        "name": "ALERT/CS",
        "type": "bidirectional",
        "description": "Alert Output in Pin Control Mode; Chip Select input in SPI Control Mode."
      },
      {
        "number": "19",
        "name": "DCLK2/SCLK",
        "type": "input",
        "description": "Data Clock Frequency Selection Pin 2 in Pin Control Mode; SPI Clock in SPI Control Mode."
      },
      {
        "number": "20",
        "name": "DCLK1/SDI",
        "type": "input",
        "description": "Data Clock Frequency Selection Pin 1 in Pin Control Mode; SPI Data Input in SPI Control Mode."
      },
      {
        "number": "21",
        "name": "DCLK0/SDO",
        "type": "output",
        "description": "Data Clock Frequency Selection Pin 0 in Pin Control Mode; SPI Data Output in SPI Control Mode."
      },
      {
        "number": "22",
        "name": "DGND",
        "type": "power_in",
        "description": "Digital Ground."
      },
      {
        "number": "23",
        "name": "DREGCAP",
        "type": "power_out",
        "description": "Digital LDO Output; decouple this pin to DGND with 1 µF capacitor."
      },
      {
        "number": "24",
        "name": "IOVDD",
        "type": "power_in",
        "description": "Digital I/O Supply and Digital LDO Supply from 1.8 V to 3.6 V; must not be lower than DREGCAP."
      },
      {
        "number": "25",
        "name": "DOUT3",
        "type": "bidirectional",
        "description": "Data Output Pin 3; acts as input pin in daisy-chain mode."
      },
      {
        "number": "26",
        "name": "DOUT2",
        "type": "bidirectional",
        "description": "Data Output Pin 2; acts as input pin in daisy-chain mode."
      },
      {
        "number": "27",
        "name": "DOUT1",
        "type": "output",
        "description": "Data Output Pin 1."
      },
      {
        "number": "28",
        "name": "DOUT0",
        "type": "output",
        "description": "Data Output Pin 0."
      },
      {
        "number": "29",
        "name": "DCLK",
        "type": "output",
        "description": "Data Output Clock."
      },
      {
        "number": "30",
        "name": "DRDY",
        "type": "output",
        "description": "Data Output Ready Pin."
      },
      {
        "number": "31",
        "name": "XTAL1",
        "type": "input",
        "description": "Crystal 1 Input Connection; tie to DGND if using CMOS clock source."
      },
      {
        "number": "32",
        "name": "XTAL2/MCLK",
        "type": "input",
        "description": "Crystal 2 Input Connection or CMOS Master Clock input."
      },
      {
        "number": "33",
        "name": "START",
        "type": "input",
        "description": "Synchronization Pulse input; internally synchronizes asynchronous pulse with MCLK; tie to DGND if unused."
      },
      {
        "number": "34",
        "name": "SYNC_OUT",
        "type": "output",
        "description": "Synchronization Signal output generated by hardware via START pin or by software via SPI."
      },
      {
        "number": "35",
        "name": "SYNC_IN",
        "type": "input",
        "description": "Reset for Internal Digital Block and Synchronization input for multiple devices."
      },
      {
        "number": "36",
        "name": "RESET",
        "type": "input",
        "description": "Asynchronous Reset Pin; resets all registers to default value; pulse recommended after power-up."
      },
      {
        "number": "37",
        "name": "AIN7+",
        "type": "input",
        "description": "Analog Input Channel 7, Positive, accepts differential or single-ended signals."
      },
      {
        "number": "38",
        "name": "AIN7−",
        "type": "input",
        "description": "Analog Input Channel 7, Negative, accepts differential or single-ended signals."
      },
      {
        "number": "39",
        "name": "AIN6+",
        "type": "input",
        "description": "Analog Input Channel 6, Positive, accepts differential or single-ended signals."
      },
      {
        "number": "40",
        "name": "AIN6−",
        "type": "input",
        "description": "Analog Input Channel 6, Negative, accepts differential or single-ended signals."
      },
      {
        "number": "41",
        "name": "REF2+",
        "type": "input",
        "description": "Positive Reference Input 2 for Channels 4-7, typical REF2− + 2.5 V."
      },
      {
        "number": "42",
        "name": "REF2−",
        "type": "input",
        "description": "Negative Reference Input 2 for Channels 4-7, typical AVSSx; connect all REFx− pins to same potential."
      },
      {
        "number": "43",
        "name": "AVDD1B",
        "type": "power_in",
        "description": "Positive Front-End Analog Supply for Channels 4-7; connect to AVDD1A."
      },
      {
        "number": "44",
        "name": "AVSS1B",
        "type": "power_in",
        "description": "Negative Front-End Analog Supply for Channels 4-7, typical −1.65 V dual supply or AGND single supply; connect all AVSSx pins to same potential."
      },
      {
        "number": "45",
        "name": "AIN5+",
        "type": "input",
        "description": "Analog Input Channel 5, Positive, accepts differential or single-ended signals."
      },
      {
        "number": "46",
        "name": "AIN5−",
        "type": "input",
        "description": "Analog Input Channel 5, Negative, accepts differential or single-ended signals."
      },
      {
        "number": "47",
        "name": "AIN4+",
        "type": "input",
        "description": "Analog Input Channel 4, Positive, accepts differential or single-ended signals."
      },
      {
        "number": "48",
        "name": "AIN4−",
        "type": "input",
        "description": "Analog Input Channel 4, Negative, accepts differential or single-ended signals."
      },
      {
        "number": "49",
        "name": "REF_OUT",
        "type": "output",
        "description": "2.5 V Reference Output; connect 100 nF capacitor if using internal reference."
      },
      {
        "number": "50",
        "name": "AVSS2B",
        "type": "power_in",
        "description": "Negative Analog Supply; connect all AVSSx pins together."
      },
      {
        "number": "51",
        "name": "AREG2CAP",
        "type": "power_out",
        "description": "Analog LDO Output 2; decouple to AVSS2B with 1 µF capacitor."
      },
      {
        "number": "52",
        "name": "AVDD2B",
        "type": "power_in",
        "description": "Positive Analog Supply from 2.2 V to 3.6 V; connect to AVDD2A."
      },
      {
        "number": "53",
        "name": "AVSS3",
        "type": "power_in",
        "description": "Negative Analog Ground; connect all AVSSx to same potential."
      },
      {
        "number": "54",
        "name": "FORMAT1",
        "type": "input",
        "description": "Output Data Frame Configuration Pin 1 for DOUTx interface format selection."
      },
      {
        "number": "55",
        "name": "FORMAT0",
        "type": "input",
        "description": "Output Data Frame Configuration Pin 0 for DOUTx interface format selection."
      },
      {
        "number": "56",
        "name": "CLK_SEL",
        "type": "input",
        "description": "Clock Source Selection pin; selects between CMOS clock input and crystal oscillator."
      },
      {
        "number": "57",
        "name": "VCM",
        "type": "output",
        "description": "Common-Mode Voltage Output, typical (AVDD1x + AVSSx)/2, provides biased reference for input configurations."
      },
      {
        "number": "58",
        "name": "AVDD2A",
        "type": "power_in",
        "description": "Positive Analog Supply from 2.2 V to 3.6 V; AVSS2x must not be lower than AREGxCAP; connect to AVDD2B."
      },
      {
        "number": "59",
        "name": "AREG1CAP",
        "type": "power_out",
        "description": "Analog LDO Output 1; decouple to AVSSx with 1 µF capacitor."
      },
      {
        "number": "60",
        "name": "AVSS2A",
        "type": "power_in",
        "description": "Negative Analog Supply; connect all AVSSx pins to same potential."
      },
      {
        "number": "61",
        "name": "AVSS4",
        "type": "power_in",
        "description": "Negative SAR Analog Supply and Reference; connect all AVSSx pins to same potential."
      },
      {
        "number": "62",
        "name": "AVDD4",
        "type": "power_in",
        "description": "Positive SAR Analog Supply and Reference Source from 3.0 V to 3.6 V."
      },
      {
        "number": "63",
        "name": "AUXAIN+",
        "type": "input",
        "description": "Positive SAR Analog Input Channel for on-chip diagnostics or external voltage measurement."
      },
      {
        "number": "64",
        "name": "AUXAIN−",
        "type": "input",
        "description": "Negative SAR Analog Input Channel for on-chip diagnostics or external voltage measurement."
      },
      {
        "number": "65",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.2",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.2",
        "primary_model": "claude-haiku-4-5-20251001",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-4-6",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Multiple MODE/GPIO pins (13, 14, 15, 16) and data pins (25, 26, 18) change function between Pin Cont; DOUT2 (pin 26) and DOUT3 (pin 25) act as inputs in daisy-chain mode; designs using daisy-chain topol; LDO output pins (23, 51, 59) require 1 µF decoupling capacitors per datasheet Specifications section",
          "exposed pad 65 added from the footprint"
        ],
        "pages_sent": 99,
        "cost_usd": 1.1606,
        "at": "2026-09-21T16:03:41"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590903756085280768",
        "pages": 99,
        "sha256": "4d717a37ccf61165",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 65,
        "described": 65,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "ad7771bcpz.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9.0,
          9.0,
          0.75
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "dce07a86ec3fe3ca87eebdff13827f55e036ced5518fee01f85cec4a3f56366d",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ad7771bcpz-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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          9.0,
          0.75
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "597026b9888b2c2f5266248ead3a34e40b7b4a00b212ba77dd6b69591620bf7f",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Analog Devices",
      "Package": "LFCSP-64(9x9)",
      "Category": "ADC/DAC/Data Conversion",
      "Pins": "65"
    }
  },
  "variants": [],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "ad7771bcpz"
  ],
  "discovery_pitch": "AD7771BCPZ (Analog Devices) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
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  "files": [
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    "README.md",
    "ad7771bcpz.kicad_sym",
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    "ad7771bcpz.glb",
    "ad7771bcpz.step",
    "ad7771bcpz.lbr",
    "docs/hero.png",
    "docs/ad7771bcpz-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
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  "visibility": {
    "public": true
  },
  "updated_at": "2026-09-24T15:37:51.663Z"
}