AD7740YRMZ-REEL7

{
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  "type": "component",
  "slug": "ad7740yrmz-reel7",
  "title": "AD7740YRMZ-REEL7",
  "brief": "Analog Devices V/F And F/V Converters, MSOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
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    "data acquisition",
    "ad7740yrmz-reel7"
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  "component": {
    "mpn": "AD7740YRMZ-REEL7",
    "manufacturer": "Analog Devices",
    "package": "MSOP-8",
    "pin_count": 8,
    "category": "Data Acquisition",
    "subcategory": "V/F And F/V Converters",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588885905419472896",
    "parts": {
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      "footprint": "ad7740yrmz-reel7.kicad_mod",
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      "lbr": "ad7740yrmz-reel7.lbr"
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    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "CLKOUT",
        "type": "output",
        "description": "Inverted clock output. When a crystal/resonator is tied between CLKOUT and CLKIN, the pin forms the on-chip oscillator loop. When CLKIN is driven by an external CMOS clock, an inverted copy of that clock appears here and can drive other circuitry (buffer recommended, one CMOS load max)."
      },
      {
        "number": "2",
        "name": "CLKIN",
        "type": "input",
        "description": "Master clock input. Accepts an external CMOS-compatible clock (32 kHz to 1 MHz) or one side of a crystal/resonator between CLKIN and CLKOUT. If CLKIN is held inactive low for 1 ms (typ), the AD7740 automatically enters power-down mode."
      },
      {
        "number": "3",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference for all on-chip circuitry."
      },
      {
        "number": "4",
        "name": "REFIN/OUT",
        "type": "bidirectional",
        "description": "Voltage reference input/output. Sets the full-scale span of the VFC. If left unconnected, the internal 2.5 V bandgap reference is the default. A precision external reference (2.5 V to VDD) may overdrive the internal reference; the internal reference output impedance is ~1 kΩ so the external source must sink/source ~400 µA."
      },
      {
        "number": "5",
        "name": "VIN",
        "type": "input",
        "description": "Analog input to the VFC. Nominal input range 0 to VREF maps to output frequency 10% to 90% of f_CLKIN, with ±150 mV overrange. Buffered mode (BUF=1): 0.1 V to VDD − 0.2 V, ~100 MΩ input impedance. Unbuffered mode (BUF=0): −0.15 V to VDD + 0.15 V, ~650 kΩ input impedance."
      },
      {
        "number": "6",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive supply input. 3.3 V ±10% or 5 V ±5% (3.0 V to 5.25 V). Decouple with a 10 µF and a 0.1 µF capacitor to GND. Typical IDD ~0.9 mA (unbuffered) or 1.1 mA (buffered); 30 µA in power-down."
      },
      {
        "number": "7",
        "name": "FOUT",
        "type": "output",
        "description": "Frequency output. Pulse train whose frequency spans 10% to 90% of f_CLKIN as VIN sweeps from 0 to VREF. Pulsewidth is fixed by the CLKIN high period; edges are synchronous with the rising edge of CLKIN (t1 ≈ 35 ns typ)."
      },
      {
        "number": "8",
        "name": "BUF",
        "type": "input",
        "description": "Buffered-mode select. BUF tied low (unbuffered): VIN range −0.15 V to VDD + 0.15 V. BUF tied high (buffered): VIN range 0.1 V to VDD − 0.2 V with very high input impedance. VIH ≥ 2.4 V (5 V) / 2.1 V (3.3 V); VIL ≤ 0.8 V / 0.4 V."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588885905419472896",
        "pages": 12,
        "sha256": "fe4577e151525739",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
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        "role": "plain",
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        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
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        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
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        "checked": "2026-10-07",
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        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Analog Devices",
      "Package": "MSOP-8",
      "Category": "Data Acquisition",
      "Pins": "8"
    }
  },
  "variants": [
    {
      "mpn": "AD7740YRMZ-REEL7",
      "kind": "packaging"
    },
    {
      "mpn": "AD7740YRMZ-REEL7KRM",
      "kind": "packaging"
    },
    {
      "mpn": "AD7740YRMZ-REEL7KRMZ",
      "kind": "packaging"
    },
    {
      "mpn": "AD7740YRMZ-REEL7KRMZ-REEL",
      "kind": "packaging"
    },
    {
      "mpn": "AD7740YRMZ-REEL7KRMZ-REEL7",
      "kind": "packaging"
    },
    {
      "mpn": "AD7740YRMZ-REEL7YRTZ-REEL7",
      "kind": "packaging"
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  "sections": [
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  "discovery_pitch": "AD7740YRMZ-REEL7 (Analog Devices) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
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  "updated_at": "2026-09-24T15:37:43.196Z"
}