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AD7740YRMZ-REEL7

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Analog Devices V/F And F/V Converters, MSOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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AD7740YRMZ-REEL7

Analog Devices · V/F And F/V Converters · MSOP-8

AD7740YRMZ-REEL7 from Analog Devices, in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CLKOUT output Inverted clock output. When a crystal/resonator is tied between CLKOUT and CLKIN, the pin forms the on-chip oscillator loop. When CLKIN is driven by an external CMOS clock, an inverted copy of that clock appears here and can drive other circuitry (buffer recommended, one CMOS load max).
2 CLKIN input Master clock input. Accepts an external CMOS-compatible clock (32 kHz to 1 MHz) or one side of a crystal/resonator between CLKIN and CLKOUT. If CLKIN is held inactive low for 1 ms (typ), the AD7740 automatically enters power-down mode.
3 GND power_in Ground reference for all on-chip circuitry.
4 REFIN/OUT bidirectional Voltage reference input/output. Sets the full-scale span of the VFC. If left unconnected, the internal 2.5 V bandgap reference is the default. A precision external reference (2.5 V to VDD) may overdrive the internal reference; the internal reference output impedance is ~1 kΩ so the external source must sink/source ~400 µA.
5 VIN input Analog input to the VFC. Nominal input range 0 to VREF maps to output frequency 10% to 90% of f_CLKIN, with ±150 mV overrange. Buffered mode (BUF=1): 0.1 V to VDD − 0.2 V, ~100 MΩ input impedance. Unbuffered mode (BUF=0): −0.15 V to VDD + 0.15 V, ~650 kΩ input impedance.
6 VDD power_in Positive supply input. 3.3 V ±10% or 5 V ±5% (3.0 V to 5.25 V). Decouple with a 10 µF and a 0.1 µF capacitor to GND. Typical IDD ~0.9 mA (unbuffered) or 1.1 mA (buffered); 30 µA in power-down.
7 FOUT output Frequency output. Pulse train whose frequency spans 10% to 90% of f_CLKIN as VIN sweeps from 0 to VREF. Pulsewidth is fixed by the CLKIN high period; edges are synchronous with the rising edge of CLKIN (t1 ≈ 35 ns typ).
8 BUF input Buffered-mode select. BUF tied low (unbuffered): VIN range −0.15 V to VDD + 0.15 V. BUF tied high (buffered): VIN range 0.1 V to VDD − 0.2 V with very high input impedance. VIH ≥ 2.4 V (5 V) / 2.1 V (3.3 V); VIL ≤ 0.8 V / 0.4 V.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package MSOP-8
Category Data Acquisition
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • AD7740YRMZ-REEL7
  • AD7740YRMZ-REEL7KRM
  • AD7740YRMZ-REEL7KRMZ
  • AD7740YRMZ-REEL7KRMZ-REEL
  • AD7740YRMZ-REEL7KRMZ-REEL7
  • AD7740YRMZ-REEL7YRTZ-REEL7

CAD (KiCad official)

  • Symbol: AD7740YRMZ-REEL7
  • Footprint: Package_SO:MSOP-8_3x3mm_P0.65mm
  • 3D model: MSOP-8 (KiCad packages3D, STEP)
  • 3D model files: ad7740yrmz-reel7-etched.step / ad7740yrmz-reel7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad7740yrmz-reel7.step / ad7740yrmz-reel7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (12 pp, sha256 fe4577e151525739, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF