AD7607BSTZ

{
  "slug": "ad7607bstz",
  "version": "0.1.0",
  "type": "component",
  "description": "Analog Devices ADCs/DACs - Special Purpose, LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "data acquisition",
    "ad7607bstz",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "ad7607bstz.kicad_sym",
    "ad7607bstz.kicad_mod",
    "ad7607bstz.glb",
    "ad7607bstz.step",
    "ad7607bstz.lbr",
    "docs/hero.png",
    "docs/ad7607bstz-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "ad7607bstz-hero.glb",
    "ad7607bstz-hero.overlay.json",
    "ad7607bstz-etched.glb"
  ],
  "component": {
    "mpn": "AD7607BSTZ",
    "manufacturer": "Analog Devices",
    "package": "LQFP-64(10x10)",
    "pin_count": 64,
    "category": "Data Acquisition",
    "subcategory": "ADCs/DACs - Special Purpose",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588886008687837184",
    "parts": {
      "symbol": "ad7607bstz.kicad_sym",
      "footprint": "ad7607bstz.kicad_mod",
      "model_3d": "ad7607bstz-hero.glb",
      "model_3d_plain": "ad7607bstz-etched.glb",
      "model_3d_step": "ad7607bstz-etched.step",
      "model_3d_step_plain": "ad7607bstz.step",
      "lbr": "ad7607bstz.lbr"
    },
    "distributor_links": {
      "lcsc": "C495343",
      "digikey": "505-AD7607BSTZ-ND"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T10:42:46Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "505-AD7607BSTZ-ND",
        "status": "found"
      },
      "mouser": {
        "pn": null,
        "status": "quota"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "AVCC",
        "type": "power_in",
        "description": "Analog supply of 4.75 V to 5.25 V that powers the internal front-end amplifiers and ADC core and must be decoupled to AGND."
      },
      {
        "number": "2",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground reference for all analog circuitry and analog input and external reference signals; all six AGND pins must connect to the system AGND plane."
      },
      {
        "number": "3",
        "name": "OS0",
        "type": "input",
        "description": "Oversampling mode select LSB, latched on the BUSY falling edge to set the oversampling ratio for the next conversion per Table 9."
      },
      {
        "number": "4",
        "name": "OS1",
        "type": "input",
        "description": "Oversampling mode select bit 1, latched on the BUSY falling edge to set the oversampling ratio for the next conversion per Table 9."
      },
      {
        "number": "5",
        "name": "OS2",
        "type": "input",
        "description": "Oversampling mode select MSB, latched on the BUSY falling edge together with OS1 and OS0 to set the oversampling ratio per Table 9."
      },
      {
        "number": "6",
        "name": "PAR/SER/BYTE SEL",
        "type": "input",
        "description": "Interface select: logic low selects the parallel interface, logic high selects the serial interface (DB15/BYTE SEL low) or the parallel byte interface (DB15/BYTE SEL high)."
      },
      {
        "number": "7",
        "name": "STBY",
        "type": "input",
        "description": "Standby input that, when low, selects standby (RANGE high) or shutdown (RANGE low) power-saving mode per Table 7."
      },
      {
        "number": "8",
        "name": "RANGE",
        "type": "input",
        "description": "Analog input range select for all channels: logic high selects ±10 V and logic low selects ±5 V, and the pin should not be changed during conversion."
      },
      {
        "number": "9",
        "name": "CONVST A",
        "type": "input",
        "description": "Conversion start input A; its rising edge holds the V1-V4 track-and-hold, and with CONVST B tied together it starts simultaneous sampling of all eight channels."
      },
      {
        "number": "10",
        "name": "CONVST B",
        "type": "input",
        "description": "Conversion start input B; its rising edge holds the V5-V8 track-and-hold, and the maximum allowed delay between the CONVST A and CONVST B rising edges is 0.5 ms (t5)."
      },
      {
        "number": "11",
        "name": "RESET",
        "type": "input",
        "description": "Active-high reset that must be pulsed after power-up with a minimum high pulse of 50 ns (tRESET); applying it during a conversion aborts the conversion."
      },
      {
        "number": "12",
        "name": "RD/SCLK",
        "type": "input",
        "description": "Parallel read control input RD when the parallel interface is selected, or serial clock input SCLK when the serial interface is selected."
      },
      {
        "number": "13",
        "name": "CS",
        "type": "input",
        "description": "Active-low chip select that enables the data frame; in parallel mode CS and RD low enable DB[15:0], and in serial mode CS frames the transfer."
      },
      {
        "number": "14",
        "name": "BUSY",
        "type": "output",
        "description": "Goes high on the CONVST rising edge and returns low when all channels finish converting, and its falling edge indicates results can be read after t4."
      },
      {
        "number": "15",
        "name": "FRSTDATA",
        "type": "output",
        "description": "Indicates when channel V1 is being read on the parallel, byte or serial interface and is tri-stated while CS is high."
      },
      {
        "number": "16",
        "name": "DB0",
        "type": "tri_state",
        "description": "Parallel data output bit 0 (LSB), tri-stated unless CS and RD are low, and tied to digital ground when PAR/SER/BYTE SEL is high."
      },
      {
        "number": "17",
        "name": "DB1",
        "type": "tri_state",
        "description": "Parallel data output bit 1, tri-stated unless CS and RD are low, and tied to digital ground when PAR/SER/BYTE SEL is high."
      },
      {
        "number": "18",
        "name": "DB2",
        "type": "tri_state",
        "description": "Parallel data output bit 2, tri-stated unless CS and RD are low, and tied to digital ground when PAR/SER/BYTE SEL is high."
      },
      {
        "number": "19",
        "name": "DB3",
        "type": "tri_state",
        "description": "Parallel data output bit 3, tri-stated unless CS and RD are low, and tied to digital ground when PAR/SER/BYTE SEL is high."
      },
      {
        "number": "20",
        "name": "DB4",
        "type": "tri_state",
        "description": "Parallel data output bit 4, tri-stated unless CS and RD are low, and tied to digital ground when PAR/SER/BYTE SEL is high."
      },
      {
        "number": "21",
        "name": "DB5",
        "type": "tri_state",
        "description": "Parallel data output bit 5, tri-stated unless CS and RD are low, and tied to digital ground when PAR/SER/BYTE SEL is high."
      },
      {
        "number": "22",
        "name": "DB6",
        "type": "tri_state",
        "description": "Parallel data output bit 6, tri-stated unless CS and RD are low, and tied to digital ground when PAR/SER/BYTE SEL is high."
      },
      {
        "number": "23",
        "name": "VDRIVE",
        "type": "power_in",
        "description": "Logic interface supply of 2.3 V to 5.25 V that sets the digital I/O logic levels and should match the host processor supply."
      },
      {
        "number": "24",
        "name": "DB7/DOUTA",
        "type": "tri_state",
        "description": "Parallel data bit 7 (MSB of the byte in byte mode), or serial output DOUTA that carries channels V1-V4 when the serial interface is selected."
      },
      {
        "number": "25",
        "name": "DB8/DOUTB",
        "type": "tri_state",
        "description": "Parallel data bit 8, or serial output DOUTB that carries channels V5-V8 when the serial interface is selected."
      },
      {
        "number": "26",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground pin associated with the analog circuitry; must connect to the system AGND plane."
      },
      {
        "number": "27",
        "name": "DB9",
        "type": "tri_state",
        "description": "Parallel data output bit 9, tri-stated unless CS and RD are low, and tied to digital ground when PAR/SER/BYTE SEL is high."
      },
      {
        "number": "28",
        "name": "DB10",
        "type": "tri_state",
        "description": "Parallel data output bit 10, tri-stated unless CS and RD are low, and tied to digital ground when PAR/SER/BYTE SEL is high."
      },
      {
        "number": "29",
        "name": "DB11",
        "type": "tri_state",
        "description": "Parallel data output bit 11, tri-stated unless CS and RD are low, and tied to digital ground when PAR/SER/BYTE SEL is high."
      },
      {
        "number": "30",
        "name": "DB12",
        "type": "tri_state",
        "description": "Parallel data output bit 12, tri-stated unless CS and RD are low, and tied to digital ground when PAR/SER/BYTE SEL is high."
      },
      {
        "number": "31",
        "name": "DB13",
        "type": "tri_state",
        "description": "Parallel data output bit 13 (MSB of the 14-bit result), tri-stated unless CS and RD are low, and tied to digital ground when PAR/SER/BYTE SEL is high."
      },
      {
        "number": "32",
        "name": "DB14/HBEN",
        "type": "bidirectional",
        "description": "Parallel data bit 14 (sign extension of DB13) in parallel mode, or HBEN in byte mode selecting whether the high byte (HBEN high) or low byte (HBEN low) is output first."
      },
      {
        "number": "33",
        "name": "DB15/BYTE SEL",
        "type": "bidirectional",
        "description": "Parallel data bit 15 (sign extension) in parallel mode, and with PAR/SER/BYTE SEL high it selects serial (low) or parallel byte (high) interface mode per Table 8."
      },
      {
        "number": "34",
        "name": "REF SELECT",
        "type": "input",
        "description": "Reference select: logic high enables the internal 2.5 V reference, while logic low disables it and requires a 2.5 V external reference on REFIN/REFOUT."
      },
      {
        "number": "35",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground pin for the analog input channels; must connect to the system AGND plane."
      },
      {
        "number": "36",
        "name": "REGCAP",
        "type": "power_out",
        "description": "Internal 2.5 V LDO regulator output that must be decoupled to AGND with a 1 µF capacitor and sits at 2.5 V to 2.7 V."
      },
      {
        "number": "37",
        "name": "AVCC",
        "type": "power_in",
        "description": "Analog supply of 4.75 V to 5.25 V; may share a decoupling capacitor with pin 38."
      },
      {
        "number": "38",
        "name": "AVCC",
        "type": "power_in",
        "description": "Analog supply of 4.75 V to 5.25 V; may share a decoupling capacitor with pin 37."
      },
      {
        "number": "39",
        "name": "REGCAP",
        "type": "power_out",
        "description": "Internal 2.5 V LDO regulator output that must be decoupled to AGND with a 1 µF capacitor and sits at 2.5 V to 2.7 V."
      },
      {
        "number": "40",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground pin for the analog circuitry; must connect to the system AGND plane."
      },
      {
        "number": "41",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground pin for the analog circuitry; must connect to the system AGND plane."
      },
      {
        "number": "42",
        "name": "REFIN/REFOUT",
        "type": "bidirectional",
        "description": "Reference output of 2.5 V when REF SELECT is high or reference input of 2.5 V when REF SELECT is low, and it requires a 10 µF ceramic decoupling capacitor to REFGND."
      },
      {
        "number": "43",
        "name": "REFGND",
        "type": "power_in",
        "description": "Reference ground pin that must be connected to AGND."
      },
      {
        "number": "44",
        "name": "REFCAPA",
        "type": "output",
        "description": "Reference buffer output force/sense pin that must be shorted to REFCAPB and decoupled to ground with a low-ESR 10 µF ceramic capacitor (buffer amplifies the reference to about 4.5 V)."
      },
      {
        "number": "45",
        "name": "REFCAPB",
        "type": "output",
        "description": "Reference buffer output force/sense pin that must be shorted to REFCAPA and decoupled to ground with a low-ESR 10 µF ceramic capacitor (buffer amplifies the reference to about 4.5 V)."
      },
      {
        "number": "46",
        "name": "REFGND",
        "type": "power_in",
        "description": "Reference ground pin that must be connected to AGND."
      },
      {
        "number": "47",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground pin for the analog circuitry; must connect to the system AGND plane."
      },
      {
        "number": "48",
        "name": "AVCC",
        "type": "power_in",
        "description": "Analog supply of 4.75 V to 5.25 V that must be decoupled to AGND."
      },
      {
        "number": "49",
        "name": "V1",
        "type": "input",
        "description": "Single-ended analog input channel 1 with 1 MΩ input impedance, ±10 V or ±5 V range set by RANGE, and clamp protection to ±16.5 V."
      },
      {
        "number": "50",
        "name": "V1GND",
        "type": "power_in",
        "description": "Analog input ground for V1; if a series resistor is used on V1, an equal resistor must be placed on V1GND to avoid offset error."
      },
      {
        "number": "51",
        "name": "V2",
        "type": "input",
        "description": "Single-ended analog input channel 2 with 1 MΩ input impedance, ±10 V or ±5 V range set by RANGE, and clamp protection to ±16.5 V."
      },
      {
        "number": "52",
        "name": "V2GND",
        "type": "power_in",
        "description": "Analog input ground for V2; if a series resistor is used on V2, an equal resistor must be placed on V2GND to avoid offset error."
      },
      {
        "number": "53",
        "name": "V3",
        "type": "input",
        "description": "Single-ended analog input channel 3 with 1 MΩ input impedance, ±10 V or ±5 V range set by RANGE, and clamp protection to ±16.5 V."
      },
      {
        "number": "54",
        "name": "V3GND",
        "type": "power_in",
        "description": "Analog input ground for V3; if a series resistor is used on V3, an equal resistor must be placed on V3GND to avoid offset error."
      },
      {
        "number": "55",
        "name": "V4",
        "type": "input",
        "description": "Single-ended analog input channel 4 with 1 MΩ input impedance, ±10 V or ±5 V range set by RANGE, and clamp protection to ±16.5 V."
      },
      {
        "number": "56",
        "name": "V4GND",
        "type": "power_in",
        "description": "Analog input ground for V4; if a series resistor is used on V4, an equal resistor must be placed on V4GND to avoid offset error."
      },
      {
        "number": "57",
        "name": "V5",
        "type": "input",
        "description": "Single-ended analog input channel 5 with 1 MΩ input impedance, ±10 V or ±5 V range set by RANGE, and clamp protection to ±16.5 V."
      },
      {
        "number": "58",
        "name": "V5GND",
        "type": "power_in",
        "description": "Analog input ground for V5; if a series resistor is used on V5, an equal resistor must be placed on V5GND to avoid offset error."
      },
      {
        "number": "59",
        "name": "V6",
        "type": "input",
        "description": "Single-ended analog input channel 6 with 1 MΩ input impedance, ±10 V or ±5 V range set by RANGE, and clamp protection to ±16.5 V."
      },
      {
        "number": "60",
        "name": "V6GND",
        "type": "power_in",
        "description": "Analog input ground for V6; if a series resistor is used on V6, an equal resistor must be placed on V6GND to avoid offset error."
      },
      {
        "number": "61",
        "name": "V7",
        "type": "input",
        "description": "Single-ended analog input channel 7 with 1 MΩ input impedance, ±10 V or ±5 V range set by RANGE, and clamp protection to ±16.5 V."
      },
      {
        "number": "62",
        "name": "V7GND",
        "type": "power_in",
        "description": "Analog input ground for V7; if a series resistor is used on V7, an equal resistor must be placed on V7GND to avoid offset error."
      },
      {
        "number": "63",
        "name": "V8",
        "type": "input",
        "description": "Single-ended analog input channel 8 with 1 MΩ input impedance, ±10 V or ±5 V range set by RANGE, and clamp protection to ±16.5 V."
      },
      {
        "number": "64",
        "name": "V8GND",
        "type": "power_in",
        "description": "Analog input ground for V8; if a series resistor is used on V8, an equal resistor must be placed on V8GND to avoid offset error."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The MPN AD7607BSTZ is listed in the ordering guide (page 31) as a 64-lead LQFP, ST-64-2, so the requ; Pin 9 and pin 10 are given in Table 6 only as 'CONVST A, CONVST B' with no explicit pin-to-name mapp; The V1–V8 analog input pins and their GND return pins are mapped from the ordered lists in Table 6 ("
        ],
        "pages_sent": 29,
        "cost_usd": 0.1928,
        "at": "2026-10-18T10:40:58"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588886008687837184",
        "pages": 32,
        "sha256": "bf0c892a0b69e76a",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 64,
        "described": 64,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
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        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          12.0,
          12.0,
          1.5
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "b0c827bc5c05552175d28affe44a5bd2ab45c9c36efff6ff07a74cc449b13db4",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ad7607bstz-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          12.0,
          12.0,
          1.5
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "63678c18980b4704bb7c90ea29e964a0c8480374dbcd2037b5465ec8fb3aa22d",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}