component
AD7304BRUZ
Public Made by Adomby adom
Analog Devices Pre-ordered Chips, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"description": "Analog Devices Pre-ordered Chips, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
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"interface ics",
"ad7304bruz",
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"extractor-text"
],
"dependencies": {},
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"ad7304bruz.step",
"ad7304bruz.lbr",
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"component": {
"mpn": "AD7304BRUZ",
"manufacturer": "Analog Devices",
"package": "TSSOP-16",
"pin_count": 16,
"category": "Interface ICs",
"subcategory": "Pre-ordered Chips",
"datasheet": "https://www.analog.com/media/en/technical-documentation/data-sheets/AD7304_7305.pdf",
"parts": {
"symbol": "ad7304bruz.kicad_sym",
"footprint": "ad7304bruz.kicad_mod",
"model_3d": "ad7304bruz-hero.glb",
"model_3d_plain": "ad7304bruz-etched.glb",
"model_3d_step": "ad7304bruz-etched.step",
"model_3d_step_plain": "ad7304bruz.step",
"lbr": "ad7304bruz.lbr"
},
"distributor_links": {
"lcsc": "C650786",
"digikey": "AD7304BRUZ-ND",
"mouser": "584-AD7304BRUZ"
},
"distributor_check": {
"checked_at": "2026-10-30T21:08:53Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "AD7304BRUZ-ND",
"status": "found"
},
"mouser": {
"pn": "584-AD7304BRUZ",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "VOUTB",
"type": "output",
"description": "Channel B rail-to-rail buffered DAC voltage output, full-scale set by the voltage on VREFB, and open circuit when SHDN is enabled."
},
{
"number": "2",
"name": "VOUTA",
"type": "output",
"description": "Channel A rail-to-rail buffered DAC voltage output, full-scale set by the voltage on VREFA, and open circuit when SHDN is enabled."
},
{
"number": "3",
"name": "VSS",
"type": "power_in",
"description": "Negative power supply input with a specified operating range of 0 V to -5.5 V."
},
{
"number": "4",
"name": "VREFA",
"type": "input",
"description": "Channel A reference input that sets the VOUTA full-scale voltage, specified for VSS < VREFA < VDD."
},
{
"number": "5",
"name": "VREFB",
"type": "input",
"description": "Channel B reference input that sets the VOUTB full-scale voltage, specified for VSS < VREFB < VDD."
},
{
"number": "6",
"name": "GND",
"type": "power_in",
"description": "Common analog and digital ground."
},
{
"number": "7",
"name": "LDAC",
"type": "input",
"description": "Active-low asynchronous load DAC register strobe that transfers all four input registers to the DAC registers, which are transparent when LDAC = 0."
},
{
"number": "8",
"name": "CLR",
"type": "input",
"description": "Active-low asynchronous input that clears all input and DAC registers to zero and does not affect the serial register."
},
{
"number": "9",
"name": "CS",
"type": "input",
"description": "Active-low chip select that disables shift register loading when high and transfers serial data to the decoded input register when it returns high."
},
{
"number": "10",
"name": "CLK",
"type": "input",
"description": "Clock input whose positive edge clocks data into the shift register, disabled by CS."
},
{
"number": "11",
"name": "SDI/SHDN",
"type": "input",
"description": "Serial data input loaded MSB first into the shift register, also the hardware shutdown control that is active when the pin is left floating by a three-state driver."
},
{
"number": "12",
"name": "VREFD",
"type": "input",
"description": "Channel D reference input that sets the VOUTD full-scale voltage, specified for VSS < VREFD < VDD."
},
{
"number": "13",
"name": "VREFC",
"type": "input",
"description": "Channel C reference input that sets the VOUTC full-scale voltage, specified for VSS < VREFC < VDD."
},
{
"number": "14",
"name": "VDD",
"type": "power_in",
"description": "Positive power supply input with a specified operating range of 2.7 V to 5.5 V."
},
{
"number": "15",
"name": "VOUTD",
"type": "output",
"description": "Channel D rail-to-rail buffered DAC voltage output, full-scale set by the voltage on VREFD, and open circuit when SHDN is enabled."
},
{
"number": "16",
"name": "VOUTC",
"type": "output",
"description": "Channel C rail-to-rail buffered DAC voltage output, full-scale set by the voltage on VREFC, and open circuit when SHDN is enabled."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-sonnet-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The ordering guide lists AD7304BRU and AD7304BRU-REEL7 as 16-Lead TSSOP (RU-16) but does not list AD; Pin types for SDI/SHDN are inferred. The pin is a logic input that also senses a floating (three-sta"
],
"pages_sent": 20,
"cost_usd": 0.1971,
"at": "2026-10-30T21:08:45"
},
"datasheet": {
"url": "https://www.analog.com/media/en/technical-documentation/data-sheets/AD7304_7305.pdf",
"pages": 20,
"sha256": "204a8502e7f12c73",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 16,
"described": 16,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "ad7304bruz.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.4,
5.0,
1.1
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "6ad5e98224d02a427d9a6b929a28dbc158b9925fba5adec12db05079f1016948",
"checked": "2026-10-30",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "ad7304bruz-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.4,
5.0,
1.1
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "c494d872257143427dec48e23ceeaba703a47204149afdcd6ef5256f297d573d",
"checked": "2026-10-30",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
],
"package_dims": {
"package_code": "RU-16",
"source_page": 18,
"D": {
"nom_mm": 5.0,
"range_mm": [
4.9,
5.1
]
},
"E1": {
"nom_mm": 4.4,
"range_mm": [
4.3,
4.5
]
},
"E": {
"nom_mm": 6.4,
"range_mm": [
null,
null
]
},
"e": {
"nom_mm": 0.65,
"range_mm": [
null,
null
]
},
"A": {
"nom_mm": 1.2,
"range_mm": [
null,
1.2
]
},
"source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
"model_check": {
"file": "ad7304bruz.step",
"verdict": "PASS",
"reasons": [
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],
"by": "factory/package_fit.py"
}
}
}
}