component
AD7266BCPZ-REEL7
Public Made by Adomby adom
Analog Devices Analog To Digital Converters (ADC), LFCSP-32(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"description": "Analog Devices Analog To Digital Converters (ADC), LFCSP-32(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
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"data acquisition",
"ad7266bcpz-reel7",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
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"component": {
"mpn": "AD7266BCPZ-REEL7",
"manufacturer": "Analog Devices",
"package": "LFCSP-32(5x5)",
"pin_count": 33,
"category": "Data Acquisition",
"subcategory": "Analog To Digital Converters (ADC)",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590145711339188224",
"parts": {
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"lbr": "ad7266bcpz-reel7.lbr"
},
"distributor_links": {
"lcsc": "C578408",
"digikey": "AD7266BCPZ-REEL7TR-ND",
"mouser": "584-AD7266BCPZ-R7"
},
"distributor_check": {
"checked_at": "2026-10-21T00:39:46Z",
"source": "Component Ocean /api/assign-pns",
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"pn": "AD7266BCPZ-REEL7TR-ND",
"status": "found"
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"status": "found",
"lifecycle": "Restricted Availability"
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},
"pins": [
{
"number": "1",
"name": "DGND",
"type": "power_in",
"description": "Digital ground reference for all digital circuitry; both DGND pins must connect to the system DGND plane and must not be more than 0.3 V from AGND, even transiently."
},
{
"number": "2",
"name": "REF SELECT",
"type": "input",
"description": "Logic input selecting the reference: tied to DGND uses the on-chip 2.5 V reference with DCAPA and DCAPB decoupled, while a logic high allows an external reference through DCAPA and/or DCAPB."
},
{
"number": "3",
"name": "AVDD",
"type": "power_in",
"description": "Analog supply voltage of 2.7 V to 5.25 V, which must stay within 0.3 V of DVDD even transiently and be decoupled to AGND."
},
{
"number": "4",
"name": "DCAPA",
"type": "passive",
"description": "Decoupling capacitor pin for the ADC A reference buffer, with 470 nF recommended; the external reference range depends on the selected analog input range."
},
{
"number": "5",
"name": "AGND",
"type": "power_in",
"description": "Analog ground reference for all analog circuitry, with all three AGND pins connected to the AGND plane and not more than 0.3 V from DGND, even transiently."
},
{
"number": "6",
"name": "AGND",
"type": "power_in",
"description": "Analog ground reference for all analog circuitry, with all three AGND pins connected to the AGND plane and not more than 0.3 V from DGND, even transiently."
},
{
"number": "7",
"name": "VA1",
"type": "input",
"description": "Analog input of ADC A, programmable as one of six single-ended channels or three true differential pairs."
},
{
"number": "8",
"name": "VA2",
"type": "input",
"description": "Analog input of ADC A, programmable as one of six single-ended channels or three true differential pairs."
},
{
"number": "9",
"name": "VA3",
"type": "input",
"description": "Analog input of ADC A, programmable as one of six single-ended channels or three true differential pairs."
},
{
"number": "10",
"name": "VA4",
"type": "input",
"description": "Analog input of ADC A, programmable as one of six single-ended channels or three true differential pairs."
},
{
"number": "11",
"name": "VA5",
"type": "input",
"description": "Analog input of ADC A, programmable as one of six single-ended channels or three true differential pairs."
},
{
"number": "12",
"name": "VA6",
"type": "input",
"description": "Analog input of ADC A, programmable as one of six single-ended channels or three true differential pairs."
},
{
"number": "13",
"name": "VB6",
"type": "input",
"description": "Analog input of ADC B, programmable as one of six single-ended channels or three true differential pairs."
},
{
"number": "14",
"name": "VB5",
"type": "input",
"description": "Analog input of ADC B, programmable as one of six single-ended channels or three true differential pairs."
},
{
"number": "15",
"name": "VB4",
"type": "input",
"description": "Analog input of ADC B, programmable as one of six single-ended channels or three true differential pairs."
},
{
"number": "16",
"name": "VB3",
"type": "input",
"description": "Analog input of ADC B, programmable as one of six single-ended channels or three true differential pairs."
},
{
"number": "17",
"name": "VB2",
"type": "input",
"description": "Analog input of ADC B, programmable as one of six single-ended channels or three true differential pairs."
},
{
"number": "18",
"name": "VB1",
"type": "input",
"description": "Analog input of ADC B, programmable as one of six single-ended channels or three true differential pairs."
},
{
"number": "19",
"name": "AGND",
"type": "power_in",
"description": "Analog ground reference for all analog circuitry, with all three AGND pins connected to the AGND plane and not more than 0.3 V from DGND, even transiently."
},
{
"number": "20",
"name": "DCAPB",
"type": "passive",
"description": "Decoupling capacitor pin for the ADC B reference buffer, with 470 nF recommended; the external reference range depends on the selected analog input range."
},
{
"number": "21",
"name": "RANGE",
"type": "input",
"description": "Logic input setting the analog input range: logic low gives 0 V to VREF, and logic high when CS goes low gives 2 × VREF."
},
{
"number": "22",
"name": "SGL/DIFF",
"type": "input",
"description": "Logic input selecting the input configuration: logic low selects differential operation and logic high selects single-ended operation."
},
{
"number": "23",
"name": "A2",
"type": "input",
"description": "Multiplexer select logic input choosing the channel pair converted simultaneously, which must be set before the acquisition time and the falling edge of CS."
},
{
"number": "24",
"name": "A1",
"type": "input",
"description": "Multiplexer select logic input choosing the channel pair converted simultaneously, which must be set before the acquisition time and the falling edge of CS."
},
{
"number": "25",
"name": "A0",
"type": "input",
"description": "Multiplexer select logic input choosing the channel pair converted simultaneously, which must be set before the acquisition time and the falling edge of CS."
},
{
"number": "26",
"name": "CS",
"type": "input",
"description": "Active-low chip select that initiates conversions on the AD7266 and frames the serial data transfer."
},
{
"number": "27",
"name": "SCLK",
"type": "input",
"description": "Serial clock logic input that clocks data out of the AD7266 and is also the clock source for the conversion process."
},
{
"number": "28",
"name": "DOUTB",
"type": "output",
"description": "Serial data output for ADC B, MSB first with two leading zeros, requiring 14 SCLKs to access the data, and clocked out on the SCLK falling edge."
},
{
"number": "29",
"name": "DGND",
"type": "power_in",
"description": "Digital ground reference for all digital circuitry; both DGND pins must connect to the system DGND plane and must not be more than 0.3 V from AGND, even transiently."
},
{
"number": "30",
"name": "DOUTA",
"type": "output",
"description": "Serial data output for ADC A, MSB first with two leading zeros, requiring 14 SCLKs to access the data, and clocked out on the SCLK falling edge."
},
{
"number": "31",
"name": "VDRIVE",
"type": "power_in",
"description": "Logic interface supply that sets the digital interface voltage, which must be decoupled to DGND and must not exceed DVDD or AVDD by more than 0.3 V."
},
{
"number": "32",
"name": "DVDD",
"type": "power_in",
"description": "Digital supply voltage of 2.7 V to 5.25 V, which must stay within 0.3 V of AVDD even transiently and be decoupled to DGND."
},
{
"number": "33",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The exposed pad has no numbered pin on the package; it is listed as EPAD in Table 4 and is included ; DCAPA and DCAPB are described as decoupling pins that can also carry an externally applied reference; Pin numbers were taken from Table 4 and cross-checked against the Figure 2 LFCSP top view, which agr",
"exposed pad 33 added from the footprint",
"dropped thermal pad ['EP'] absent from footprint"
],
"pages_sent": 10,
"cost_usd": 0.0874,
"at": "2026-10-21T00:36:43"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590145711339188224",
"pages": 28,
"sha256": "ef619f55aa5e6d94",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 33,
"described": 33,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
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"checked": "2026-10-21",
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}