AD7124-4BRUZ-RL

{
  "slug": "ad7124-4bruz-rl",
  "version": "0.1.0",
  "type": "component",
  "description": "Analog Devices Analog To Digital Converters (ADCs), TSSOP-24. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "adc-dac-data conversion",
    "ad7124-4bruz-rl",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
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    "path": "docs/hero.png"
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    "ad7124-4bruz-rl.kicad_mod",
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    "ad7124-4bruz-rl.step",
    "ad7124-4bruz-rl.lbr",
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  "component": {
    "mpn": "AD7124-4BRUZ-RL",
    "manufacturer": "Analog Devices",
    "package": "TSSOP-24",
    "pin_count": 24,
    "category": "ADC/DAC/Data Conversion",
    "subcategory": "Analog To Digital Converters (ADCs)",
    "datasheet": "https://www.analog.com/media/en/technical-documentation/data-sheets/AD7124-4.pdf",
    "parts": {
      "symbol": "ad7124-4bruz-rl.kicad_sym",
      "footprint": "ad7124-4bruz-rl.kicad_mod",
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      "lbr": "ad7124-4bruz-rl.lbr"
    },
    "distributor_links": {
      "lcsc": "C650585",
      "digikey": "505-AD7124-4BRUZ-RLTR-ND",
      "mouser": "584-AD7124-4BRUZ-RL"
    },
    "distributor_check": {
      "checked_at": "2026-10-29T03:55:32Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "505-AD7124-4BRUZ-RLTR-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "584-AD7124-4BRUZ-RL",
        "status": "found",
        "lifecycle": "Restricted Availability"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "DIN",
        "type": "input",
        "description": "Serial data input to the ADC input shift register, transferred to the control registers as selected by the communications register bits."
      },
      {
        "number": "2",
        "name": "SCLK",
        "type": "input",
        "description": "Serial clock input for data transfers to and from the ADC, with a Schmitt-triggered input suitable for opto-isolated applications."
      },
      {
        "number": "3",
        "name": "CLK",
        "type": "bidirectional",
        "description": "Clock input/output; the internal clock can be made available at this pin, or the internal clock can be disabled and the ADC driven by an external clock."
      },
      {
        "number": "4",
        "name": "CS",
        "type": "input",
        "description": "Active-low chip select input that selects the ADC; it can be hardwired low when SPI diagnostics are unused for 3-wire operation."
      },
      {
        "number": "5",
        "name": "REGCAPD",
        "type": "power_out",
        "description": "Digital LDO regulator output that must be decoupled to DGND with a 0.1 µF capacitor."
      },
      {
        "number": "6",
        "name": "IOVDD",
        "type": "power_in",
        "description": "Serial interface supply voltage, 1.65 V to 3.6 V, independent of AVDD."
      },
      {
        "number": "7",
        "name": "DGND",
        "type": "power_in",
        "description": "Digital ground reference point."
      },
      {
        "number": "8",
        "name": "AIN0/IOUT/VBIAS",
        "type": "passive",
        "description": "Analog input 0, configurable as a positive or negative differential or pseudo-differential terminal, or alternatively as an excitation current (IOUT0/IOUT1) output or bias voltage (VBIAS) output."
      },
      {
        "number": "9",
        "name": "AIN1/IOUT/VBIAS",
        "type": "passive",
        "description": "Analog input 1, configurable as a positive or negative differential or pseudo-differential terminal, or alternatively as an excitation current (IOUT0/IOUT1) output or bias voltage (VBIAS) output."
      },
      {
        "number": "10",
        "name": "AIN2/IOUT/VBIAS/P1",
        "type": "passive",
        "description": "Analog input 2, alternatively an excitation current (IOUT0/IOUT1) output or VBIAS output, and can also be configured as general-purpose output P1 referenced between AVSS and AVDD."
      },
      {
        "number": "11",
        "name": "AIN3/IOUT/VBIAS/P2",
        "type": "passive",
        "description": "Analog input 3, alternatively an excitation current (IOUT0/IOUT1) output or VBIAS output, and can also be configured as general-purpose output P2 referenced between AVSS and AVDD."
      },
      {
        "number": "12",
        "name": "REFIN1(+)",
        "type": "passive",
        "description": "Positive external reference input, which can be anywhere between AVDD and AVSS + 0.5 V; the nominal reference is 2.5 V and the device functions with a reference from 0.5 V to AVDD."
      },
      {
        "number": "13",
        "name": "REFIN1(−)",
        "type": "passive",
        "description": "Negative reference input, which can be anywhere between AVSS and AVDD − 0.5 V."
      },
      {
        "number": "14",
        "name": "AIN4/IOUT/VBIAS",
        "type": "passive",
        "description": "Analog input 4, configurable as a positive or negative differential or pseudo-differential terminal, or alternatively as an excitation current (IOUT0/IOUT1) output or bias voltage (VBIAS) output."
      },
      {
        "number": "15",
        "name": "AIN5/IOUT/VBIAS",
        "type": "passive",
        "description": "Analog input 5, configurable as a positive or negative differential or pseudo-differential terminal, or alternatively as an excitation current (IOUT0/IOUT1) output or bias voltage (VBIAS) output."
      },
      {
        "number": "16",
        "name": "AIN6/IOUT/VBIAS/REFIN2(+)",
        "type": "passive",
        "description": "Analog input 6, alternatively an excitation current or VBIAS output, and also the positive reference input for REFIN2(±), which can be anywhere between AVDD and AVSS + 0.5 V."
      },
      {
        "number": "17",
        "name": "AIN7/IOUT/VBIAS/REFIN2(−)",
        "type": "passive",
        "description": "Analog input 7, alternatively an excitation current or VBIAS output, and also the negative reference input for REFIN2(±), which can be anywhere between AVSS and AVDD − 0.5 V."
      },
      {
        "number": "18",
        "name": "REFOUT",
        "type": "power_out",
        "description": "Buffered output of the internal 2.5 V voltage reference."
      },
      {
        "number": "19",
        "name": "AVSS",
        "type": "power_in",
        "description": "Analog supply voltage reference; AVDD − AVSS must be 2.7 V to 3.6 V in mid or low power mode and 2.9 V to 3.6 V in full power mode, and AVSS can be taken below 0 V for a ±1.8 V dual supply."
      },
      {
        "number": "20",
        "name": "REGCAPA",
        "type": "power_out",
        "description": "Analog LDO regulator output that must be decoupled to AVSS with a 0.1 µF capacitor."
      },
      {
        "number": "21",
        "name": "PSW",
        "type": "passive",
        "description": "Low-side power switch to AVSS, which can carry up to 30 mA continuous current."
      },
      {
        "number": "22",
        "name": "AVDD",
        "type": "power_in",
        "description": "Analog supply voltage, relative to AVSS."
      },
      {
        "number": "23",
        "name": "SYNC",
        "type": "input",
        "description": "Logic input for synchronizing the digital filters and analog modulators across multiple devices; when low it resets the filter, filter control and calibration control logic and holds the modulator in reset, and it resets RDY high."
      },
      {
        "number": "24",
        "name": "DOUT/RDY",
        "type": "output",
        "description": "Serial data output that also serves as the data-ready output, going low to indicate conversion completion and returning high if the data is not read before the next update."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Pin numbers and functions were taken from the 24-Lead TSSOP column of Table 7 (Pin Function Descript; Ordering guide (page 94) lists AD7124-4BRUZ-RL as a 24-Lead TSSOP (RU-24) reel, so the TSSOP pinout ; KiCad type choices that are not explicit in the datasheet: analog inputs and reference inputs are ty"
        ],
        "pages_sent": 17,
        "cost_usd": 0.1159,
        "at": "2026-10-29T03:55:16"
      },
      "datasheet": {
        "url": "https://www.analog.com/media/en/technical-documentation/data-sheets/AD7124-4.pdf",
        "pages": 94,
        "sha256": "8a9194657efa8d5c",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 24,
        "described": 24,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
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        "zmin_mm": 0.0,
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        "checked": "2026-10-29",
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      },
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        "sha256": "4d73ad3357285061117767073928c657ee2b1e3b2e47cacf71656ceb453f13ac",
        "checked": "2026-10-29",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
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  }
}