component
AD5930YRUZ
Public Made by Adomby adom
Analog Devices Direct Digital Synthesis (DDS), TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747
{
"schema_version": 1,
"type": "component",
"slug": "ad5930yruz",
"title": "AD5930YRUZ",
"brief": "Analog Devices Direct Digital Synthesis (DDS), TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"adc-dac-data conversion",
"ad5930yruz",
"factory-2.0.0",
"extractor-text"
],
"component": {
"mpn": "AD5930YRUZ",
"manufacturer": "Analog Devices",
"package": "TSSOP-20",
"pin_count": 20,
"category": "ADC/DAC/Data Conversion",
"subcategory": "Direct Digital Synthesis (DDS)",
"datasheet": "https://www.analog.com/media/en/technical-documentation/data-sheets/AD5930.pdf",
"parts": {
"symbol": "ad5930yruz.kicad_sym",
"footprint": "ad5930yruz.kicad_mod",
"model_3d": "ad5930yruz-hero.glb",
"model_3d_plain": "ad5930yruz-etched.glb",
"model_3d_step": "ad5930yruz-etched.step",
"model_3d_step_plain": "ad5930yruz.step",
"lbr": "ad5930yruz.lbr"
},
"distributor_links": {
"lcsc": "C650302",
"digikey": "505-AD5930YRUZ-ND",
"mouser": "584-AD5930YRUZ"
},
"distributor_check": {
"checked_at": "2026-10-31T09:27:22Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "505-AD5930YRUZ-ND",
"status": "found"
},
"mouser": {
"pn": "584-AD5930YRUZ",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "FSADJUST",
"type": "passive",
"description": "Full-scale adjust control; an external RSET (6.8 kΩ typical) is connected between this pin and AGND to set full-scale DAC current IOUTFULL-SCALE = 18 × VREFOUT/RSET with VREFOUT = 1.20 V nominal."
},
{
"number": "2",
"name": "REF",
"type": "bidirectional",
"description": "Voltage reference input or output; internal 1.18 V reference is available here or can be overdriven by an external reference, with a 10 nF decoupling capacitor to AGND."
},
{
"number": "3",
"name": "COMP",
"type": "passive",
"description": "DAC bias pin used for decoupling the DAC bias voltage to AVDD."
},
{
"number": "4",
"name": "AVDD",
"type": "power_in",
"description": "Positive power supply for the analog section, 2.3 V to 5.5 V, with a 0.1 µF decoupling capacitor to AGND."
},
{
"number": "5",
"name": "DVDD",
"type": "power_in",
"description": "Positive power supply for the digital section, 2.3 V to 5.5 V, with a 0.1 µF decoupling capacitor to DGND."
},
{
"number": "6",
"name": "CAP/2.5V",
"type": "passive",
"description": "Output of the on-board 2.5 V regulator for digital circuitry generated from DVDD, requiring a typically 100 nF capacitor to DGND; can be shorted to DVDD if DVDD is 2.7 V or less."
},
{
"number": "7",
"name": "DGND",
"type": "power_in",
"description": "Ground for all digital circuitry, excluding digital output buffers."
},
{
"number": "8",
"name": "MCLK",
"type": "input",
"description": "Digital clock input; DDS output frequencies are a binary fraction of MCLK, which determines output frequency accuracy and phase noise."
},
{
"number": "9",
"name": "SYNCOUT",
"type": "output",
"description": "Digital output for sweep status (end of sweep or frequency increments), selectable via the control register and enabled by setting SYNCOPEN to 1."
},
{
"number": "10",
"name": "MSBOUT",
"type": "output",
"description": "Digital output giving the inverted MSB of the DAC data, enabled by setting MSBOUTEN in the control register to 1."
},
{
"number": "11",
"name": "DGND O/P",
"type": "power_in",
"description": "Separate DGND connection for the digital output buffers; connect to DGND."
},
{
"number": "12",
"name": "INTERRUPT",
"type": "input",
"description": "Digital input acting as an interrupt during a sweep; a low-to-high transition sampled by the internal MCLK resets the state machines and sends the DAC output to midscale."
},
{
"number": "13",
"name": "CTRL",
"type": "input",
"description": "Digital input with triple function for initialization, start and external frequency increments; a low-to-high transition sampled by MCLK starts the preprogrammed sweep."
},
{
"number": "14",
"name": "SDATA",
"type": "input",
"description": "Serial data input; the 16-bit word is applied with the register address first followed by data MSB to LSB."
},
{
"number": "15",
"name": "SCLK",
"type": "input",
"description": "Serial clock input; data is clocked in on each falling SCLK edge."
},
{
"number": "16",
"name": "FSYNC",
"type": "input",
"description": "Active-low frame synchronization control input; taking it low signals that a new word is being loaded."
},
{
"number": "17",
"name": "STANDBY",
"type": "input",
"description": "Active-high standby input that disables the internal MCLK and powers down the reference DAC and regulator, giving typically 20 µA shutdown current after a reset."
},
{
"number": "18",
"name": "AGND",
"type": "power_in",
"description": "Ground for all analog circuitry."
},
{
"number": "19",
"name": "IOUT",
"type": "output",
"description": "High-impedance current source output; connect a nominal 200 Ω load to AGND with a recommended 20 pF capacitor to AGND, and a differential signal is available with IOUTB."
},
{
"number": "20",
"name": "IOUTB",
"type": "output",
"description": "Complementary current output to IOUT, preferably tied through a 200 Ω resistor to AGND (or directly to AGND), with a recommended 20 pF capacitor to AGND."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-sonnet-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Pin types for FSADJUST, COMP, CAP/2.5V (passive) and REF (bidirectional) are inferred from the descr; Datasheet text uses SYNCOPEN/SYNCOP naming in pin 9 and the control register table, while the regist"
],
"pages_sent": 11,
"cost_usd": 0.1392,
"at": "2026-10-31T09:27:01"
},
"datasheet": {
"url": "https://www.analog.com/media/en/technical-documentation/data-sheets/AD5930.pdf",
"pages": 28,
"sha256": "bfd40c006f3fff15",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 20,
"described": 20,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "ad5930yruz.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.4,
6.5,
1.2
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "97339947f3a7196470ec2f1d9f9b92bb2fc2ab66ad53be0cf105192585ef3c9a",
"checked": "2026-10-31",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "ad5930yruz-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.4,
6.5,
1.2
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "a33a81581dbba3f1ccb6f547317fccedeb575dba256f1c70de4be5d9db8c15db",
"checked": "2026-10-31",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
],
"package_dims": {
"package_code": "RU-20",
"source_page": 27,
"D": {
"nom_mm": 6.5,
"range_mm": [
6.4,
6.6
]
},
"E1": {
"nom_mm": 4.4,
"range_mm": [
4.3,
4.5
]
},
"E": {
"nom_mm": 6.4,
"range_mm": [
null,
null
]
},
"e": {
"nom_mm": 0.65,
"range_mm": [
null,
null
]
},
"A": {
"nom_mm": 1.2,
"range_mm": [
null,
1.2
]
},
"source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
"model_check": {
"file": "ad5930yruz.step",
"verdict": "PASS",
"reasons": [
"height and body within the datasheet's package drawing"
],
"by": "factory/package_fit.py"
}
}
},
"metadata": {
"specs": {
"Manufacturer": "Analog Devices",
"Package": "TSSOP-20",
"Category": "ADC/DAC/Data Conversion",
"Pins": "20"
},
"characteristics": {
"version": 1,
"source": "datasheet",
"datasheet_sha256": "bfd40c006f3fff15eb2147d9cfd575dc69c297860256750f466acc8cda53d717",
"rows": [
{
"name": "Supply voltage AVDD/DVDD",
"symbol": "AVDD/DVDD",
"kind": "electrical",
"unit": "V",
"min": 2.3,
"typ": null,
"max": 5.5,
"conditions": "fMCLK = 50 MHz, fOUT = fMCLK/7",
"source_page": 5,
"source": "datasheet"
},
{
"name": "Analog supply current",
"symbol": "IAA",
"kind": "electrical",
"unit": "mA",
"min": null,
"typ": 3.8,
"max": 4,
"conditions": "fMCLK = 50 MHz, fOUT = fMCLK/7",
"source_page": 5,
"source": "datasheet"
},
{
"name": "Digital supply current",
"symbol": "IDD",
"kind": "electrical",
"unit": "mA",
"min": null,
"typ": 2.4,
"max": 2.7,
"conditions": "fMCLK = 50 MHz, fOUT = fMCLK/7",
"source_page": 5,
"source": "datasheet"
},
{
"name": "Total supply current",
"symbol": "IAA + IDD",
"kind": "electrical",
"unit": "mA",
"min": null,
"typ": 6.2,
"max": 6.7,
"conditions": "fMCLK = 50 MHz, fOUT = fMCLK/7",
"source_page": 5,
"source": "datasheet"
},
{
"name": "Low power sleep mode current, MCLK = 0 V",
"symbol": "",
"kind": "electrical",
"unit": "µA",
"min": null,
"typ": 20,
"max": 85,
"conditions": "All outputs powered down, MCLK = 0 V, serial interface active; device is reset before putting into standby",
"source_page": 5,
"source": "datasheet"
},
{
"name": "Low power sleep mode current, MCLK active",
"symbol": "",
"kind": "electrical",
"unit": "µA",
"min": null,
"typ": 140,
"max": 240,
"conditions": "All outputs powered down, MCLK active, serial interface active; device is reset before putting into standby",
"source_page": 5,
"source": "datasheet"
},
{
"name": "MCLK period",
"symbol": "t1",
"kind": "timing",
"unit": "ns",
"min": 20,
"typ": null,
"max": null,
"conditions": "MCLK period",
"source_page": 6,
"source": "datasheet"
},
{
"name": "MCLK high duration",
"symbol": "t2",
"kind": "timing",
"unit": "ns",
"min": 8,
"typ": null,
"max": null,
"conditions": "MCLK high duration",
"source_page": 6,
"source": "datasheet"
},
{
"name": "MCLK low duration",
"symbol": "t3",
"kind": "timing",
"unit": "ns",
"min": 8,
"typ": null,
"max": null,
"conditions": "MCLK low duration",
"source_page": 6,
"source": "datasheet"
},
{
"name": "SCLK period",
"symbol": "t4",
"kind": "timing",
"unit": "ns",
"min": 25,
"typ": null,
"max": null,
"conditions": "SCLK period",
"source_page": 6,
"source": "datasheet"
},
{
"name": "SCLK high time",
"symbol": "t5",
"kind": "timing",
"unit": "ns",
"min": 10,
"typ": null,
"max": null,
"conditions": "SCLK high time",
"source_page": 6,
"source": "datasheet"
},
{
"name": "SCLK low time",
"symbol": "t6",
"kind": "timing",
"unit": "ns",
"min": 10,
"typ": null,
"max": null,
"conditions": "SCLK low time",
"source_page": 6,
"source": "datasheet"
},
{
"name": "FSYNC to SCLK falling edge setup time",
"symbol": "t7",
"kind": "timing",
"unit": "ns",
"min": 5,
"typ": null,
"max": null,
"conditions": "FSYNC to SCLK falling edge setup time",
"source_page": 6,
"source": "datasheet"
},
{
"name": "FSYNC to SCLK hold time",
"symbol": "t8",
"kind": "timing",
"unit": "ns",
"min": 10,
"typ": null,
"max": null,
"conditions": "FSYNC to SCLK hold time",
"source_page": 6,
"source": "datasheet"
},
{
"name": "Data setup time",
"symbol": "t9",
"kind": "timing",
"unit": "ns",
"min": 5,
"typ": null,
"max": null,
"conditions": "Data setup time",
"source_page": 6,
"source": "datasheet"
},
{
"name": "Data hold time",
"symbol": "t10",
"kind": "timing",
"unit": "ns",
"min": 3,
"typ": null,
"max": null,
"conditions": "Data hold time",
"source_page": 6,
"source": "datasheet"
},
{
"name": "Minimum CTRL pulse width",
"symbol": "t11",
"kind": "timing",
"unit": "ns",
"min": 2,
"typ": null,
"max": null,
"conditions": "Minimum CTRL pulse width; printed as 2 x t1",
"source_page": 6,
"source": "datasheet"
},
{
"name": "CTRL rising edge to MCLK falling edge setup time",
"symbol": "t12",
"kind": "timing",
"unit": "ns",
"min": 0,
"typ": null,
"max": null,
"conditions": "CTRL rising edge to MCLK falling edge setup time",
"source_page": 6,
"source": "datasheet"
},
{
"name": "MCLK falling edge after 16th clock edge to MSB out",
"symbol": "t17",
"kind": "timing",
"unit": "ns",
"min": null,
"typ": null,
"max": 20,
"conditions": "MCLK falling edge after 16th clock edge to MSB out",
"source_page": 6,
"source": "datasheet"
},
{
"name": "AVDD to AGND",
"symbol": "AVDD",
"kind": "absolute_maximum",
"unit": "V",
"min": -0.3,
"typ": null,
"max": 6,
"conditions": "TA = 25°C",
"source_page": 8,
"source": "datasheet"
},
{
"name": "DVDD to DGND",
"symbol": "DVDD",
"kind": "absolute_maximum",
"unit": "V",
"min": -0.3,
"typ": null,
"max": 6,
"conditions": "TA = 25°C",
"source_page": 8,
"source": "datasheet"
},
{
"name": "AGND to DGND",
"symbol": "",
"kind": "absolute_maximum",
"unit": "V",
"min": -0.3,
"typ": null,
"max": 0.3,
"conditions": "TA = 25°C",
"source_page": 8,
"source": "datasheet"
},
{
"name": "CAP/2.5V to DGND",
"symbol": "",
"kind": "absolute_maximum",
"unit": "V",
"min": -0.3,
"typ": null,
"max": 2.75,
"conditions": "TA = 25°C",
"source_page": 8,
"source": "datasheet"
},
{
"name": "Digital I/O voltage to DGND",
"symbol": "",
"kind": "absolute_maximum",
"unit": "V",
"min": -0.3,
"typ": null,
"max": null,
"conditions": "Upper limit DVDD + 0.3 V; TA = 25°C",
"source_page": 8,
"source": "datasheet"
},
{
"name": "Analog I/O voltage to AGND",
"symbol": "",
"kind": "absolute_maximum",
"unit": "V",
"min": -0.3,
"typ": null,
"max": null,
"conditions": "Upper limit AVDD + 0.3 V; TA = 25°C",
"source_page": 8,
"source": "datasheet"
},
{
"name": "Operating temperature range (Y version)",
"symbol": "",
"kind": "absolute_maximum",
"unit": "°C",
"min": -40,
"typ": null,
"max": 125,
"conditions": "Automotive (Y Version)",
"source_page": 8,
"source": "datasheet"
},
{
"name": "Storage temperature range",
"symbol": "",
"kind": "absolute_maximum",
"unit": "°C",
"min": -65,
"typ": null,
"max": 150,
"conditions": "",
"source_page": 8,
"source": "datasheet"
},
{
"name": "Maximum junction temperature",
"symbol": "",
"kind": "absolute_maximum",
"unit": "°C",
"min": null,
"typ": null,
"max": 150,
"conditions": "",
"source_page": 8,
"source": "datasheet"
},
{
"name": "Reflow soldering (Pb-free)",
"symbol": "",
"kind": "absolute_maximum",
"unit": "°C",
"min": null,
"typ": null,
"max": 300,
"conditions": "Reflow soldering (Pb-Free)",
"source_page": 8,
"source": "datasheet"
},
{
"name": "Thermal impedance junction to ambient",
"symbol": "θJA",
"kind": "thermal",
"unit": "°C/W",
"min": null,
"typ": 112,
"max": null,
"conditions": "TSSOP package, 4-layer board",
"source_page": 8,
"source": "datasheet"
},
{
"name": "Thermal impedance junction to case",
"symbol": "θJC",
"kind": "thermal",
"unit": "°C/W",
"min": null,
"typ": 27.6,
"max": null,
"conditions": "TSSOP package, 4-layer board",
"source_page": 8,
"source": "datasheet"
},
{
"name": "CTRL rising edge to IOUT/IOUTB delay (10 x t1)",
"symbol": "t13",
"kind": "timing",
"unit": "ns",
"min": null,
"typ": 10,
"max": null,
"conditions": "Initial pulse, includes initialization; printed as 10 x t1",
"source_page": 6,
"source": "datasheet"
},
{
"name": "CTRL rising edge to IOUT/IOUTB delay (8 x t1)",
"symbol": "t13",
"kind": "timing",
"unit": "ns",
"min": null,
"typ": 8,
"max": null,
"conditions": "Initial pulse, includes initialization; printed as 8 x t1",
"source_page": 6,
"source": "datasheet"
}
]
}
},
"variants": [],
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"ad5930yruz"
],
"discovery_pitch": "AD5930YRUZ (Analog Devices) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
"author": {
"name": "Ray",
"email": "[email protected]"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"ad5930yruz.kicad_sym",
"ad5930yruz.kicad_mod",
"ad5930yruz.glb",
"ad5930yruz.step",
"ad5930yruz.lbr",
"docs/hero.png",
"docs/ad5930yruz-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"ad5930yruz-hero.glb",
"ad5930yruz-hero.overlay.json",
"ad5930yruz-etched.glb"
],
"visibility": {
"public": true
}
}