AD5930YRUZ

{
  "slug": "ad5930yruz",
  "version": "0.1.0",
  "type": "component",
  "description": "Analog Devices Direct Digital Synthesis (DDS), TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "adc-dac-data conversion",
    "ad5930yruz",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "ad5930yruz.kicad_sym",
    "ad5930yruz.kicad_mod",
    "ad5930yruz.glb",
    "ad5930yruz.step",
    "ad5930yruz.lbr",
    "docs/hero.png",
    "docs/ad5930yruz-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "ad5930yruz-hero.glb",
    "ad5930yruz-hero.overlay.json",
    "ad5930yruz-etched.glb"
  ],
  "component": {
    "mpn": "AD5930YRUZ",
    "manufacturer": "Analog Devices",
    "package": "TSSOP-20",
    "pin_count": 20,
    "category": "ADC/DAC/Data Conversion",
    "subcategory": "Direct Digital Synthesis (DDS)",
    "datasheet": "https://www.analog.com/media/en/technical-documentation/data-sheets/AD5930.pdf",
    "parts": {
      "symbol": "ad5930yruz.kicad_sym",
      "footprint": "ad5930yruz.kicad_mod",
      "model_3d": "ad5930yruz-hero.glb",
      "model_3d_plain": "ad5930yruz-etched.glb",
      "model_3d_step": "ad5930yruz-etched.step",
      "model_3d_step_plain": "ad5930yruz.step",
      "lbr": "ad5930yruz.lbr"
    },
    "distributor_links": {
      "lcsc": "C650302",
      "digikey": "505-AD5930YRUZ-ND",
      "mouser": "584-AD5930YRUZ"
    },
    "distributor_check": {
      "checked_at": "2026-10-31T09:27:22Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "505-AD5930YRUZ-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "584-AD5930YRUZ",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "FSADJUST",
        "type": "passive",
        "description": "Full-scale adjust control; an external RSET (6.8 kΩ typical) is connected between this pin and AGND to set full-scale DAC current IOUTFULL-SCALE = 18 × VREFOUT/RSET with VREFOUT = 1.20 V nominal."
      },
      {
        "number": "2",
        "name": "REF",
        "type": "bidirectional",
        "description": "Voltage reference input or output; internal 1.18 V reference is available here or can be overdriven by an external reference, with a 10 nF decoupling capacitor to AGND."
      },
      {
        "number": "3",
        "name": "COMP",
        "type": "passive",
        "description": "DAC bias pin used for decoupling the DAC bias voltage to AVDD."
      },
      {
        "number": "4",
        "name": "AVDD",
        "type": "power_in",
        "description": "Positive power supply for the analog section, 2.3 V to 5.5 V, with a 0.1 µF decoupling capacitor to AGND."
      },
      {
        "number": "5",
        "name": "DVDD",
        "type": "power_in",
        "description": "Positive power supply for the digital section, 2.3 V to 5.5 V, with a 0.1 µF decoupling capacitor to DGND."
      },
      {
        "number": "6",
        "name": "CAP/2.5V",
        "type": "passive",
        "description": "Output of the on-board 2.5 V regulator for digital circuitry generated from DVDD, requiring a typically 100 nF capacitor to DGND; can be shorted to DVDD if DVDD is 2.7 V or less."
      },
      {
        "number": "7",
        "name": "DGND",
        "type": "power_in",
        "description": "Ground for all digital circuitry, excluding digital output buffers."
      },
      {
        "number": "8",
        "name": "MCLK",
        "type": "input",
        "description": "Digital clock input; DDS output frequencies are a binary fraction of MCLK, which determines output frequency accuracy and phase noise."
      },
      {
        "number": "9",
        "name": "SYNCOUT",
        "type": "output",
        "description": "Digital output for sweep status (end of sweep or frequency increments), selectable via the control register and enabled by setting SYNCOPEN to 1."
      },
      {
        "number": "10",
        "name": "MSBOUT",
        "type": "output",
        "description": "Digital output giving the inverted MSB of the DAC data, enabled by setting MSBOUTEN in the control register to 1."
      },
      {
        "number": "11",
        "name": "DGND O/P",
        "type": "power_in",
        "description": "Separate DGND connection for the digital output buffers; connect to DGND."
      },
      {
        "number": "12",
        "name": "INTERRUPT",
        "type": "input",
        "description": "Digital input acting as an interrupt during a sweep; a low-to-high transition sampled by the internal MCLK resets the state machines and sends the DAC output to midscale."
      },
      {
        "number": "13",
        "name": "CTRL",
        "type": "input",
        "description": "Digital input with triple function for initialization, start and external frequency increments; a low-to-high transition sampled by MCLK starts the preprogrammed sweep."
      },
      {
        "number": "14",
        "name": "SDATA",
        "type": "input",
        "description": "Serial data input; the 16-bit word is applied with the register address first followed by data MSB to LSB."
      },
      {
        "number": "15",
        "name": "SCLK",
        "type": "input",
        "description": "Serial clock input; data is clocked in on each falling SCLK edge."
      },
      {
        "number": "16",
        "name": "FSYNC",
        "type": "input",
        "description": "Active-low frame synchronization control input; taking it low signals that a new word is being loaded."
      },
      {
        "number": "17",
        "name": "STANDBY",
        "type": "input",
        "description": "Active-high standby input that disables the internal MCLK and powers down the reference DAC and regulator, giving typically 20 µA shutdown current after a reset."
      },
      {
        "number": "18",
        "name": "AGND",
        "type": "power_in",
        "description": "Ground for all analog circuitry."
      },
      {
        "number": "19",
        "name": "IOUT",
        "type": "output",
        "description": "High-impedance current source output; connect a nominal 200 Ω load to AGND with a recommended 20 pF capacitor to AGND, and a differential signal is available with IOUTB."
      },
      {
        "number": "20",
        "name": "IOUTB",
        "type": "output",
        "description": "Complementary current output to IOUT, preferably tied through a 200 Ω resistor to AGND (or directly to AGND), with a recommended 20 pF capacitor to AGND."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-sonnet-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Pin types for FSADJUST, COMP, CAP/2.5V (passive) and REF (bidirectional) are inferred from the descr; Datasheet text uses SYNCOPEN/SYNCOP naming in pin 9 and the control register table, while the regist"
        ],
        "pages_sent": 11,
        "cost_usd": 0.1392,
        "at": "2026-10-31T09:27:01"
      },
      "datasheet": {
        "url": "https://www.analog.com/media/en/technical-documentation/data-sheets/AD5930.pdf",
        "pages": 28,
        "sha256": "bfd40c006f3fff15",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 20,
        "described": 20,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "ad5930yruz.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          6.5,
          1.2
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "97339947f3a7196470ec2f1d9f9b92bb2fc2ab66ad53be0cf105192585ef3c9a",
        "checked": "2026-10-31",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ad5930yruz-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          6.5,
          1.2
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "a33a81581dbba3f1ccb6f547317fccedeb575dba256f1c70de4be5d9db8c15db",
        "checked": "2026-10-31",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ],
    "package_dims": {
      "package_code": "RU-20",
      "source_page": 27,
      "D": {
        "nom_mm": 6.5,
        "range_mm": [
          6.4,
          6.6
        ]
      },
      "E1": {
        "nom_mm": 4.4,
        "range_mm": [
          4.3,
          4.5
        ]
      },
      "E": {
        "nom_mm": 6.4,
        "range_mm": [
          null,
          null
        ]
      },
      "e": {
        "nom_mm": 0.65,
        "range_mm": [
          null,
          null
        ]
      },
      "A": {
        "nom_mm": 1.2,
        "range_mm": [
          null,
          1.2
        ]
      },
      "source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
      "model_check": {
        "file": "ad5930yruz.step",
        "verdict": "PASS",
        "reasons": [
          "height and body within the datasheet's package drawing"
        ],
        "by": "factory/package_fit.py"
      }
    }
  }
}