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Ray Set visibility: public a444b2b 3d ago
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  "slug": "ad5761bruz",
  "title": "AD5761BRUZ",
  "brief": "Analog Devices Digital To Analog Converters (DACs), TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
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    "mpn": "AD5761BRUZ",
    "manufacturer": "Analog Devices",
    "package": "TSSOP-16",
    "pin_count": 16,
    "category": "Data Converters",
    "subcategory": "Digital To Analog Converters (DACs)",
    "datasheet": "https://www.analog.com/media/en/technical-documentation/data-sheets/AD5761_5721.pdf",
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      "footprint": "ad5761bruz.kicad_mod",
      "model_3d": "ad5761bruz-hero.glb",
      "model_3d_plain": "ad5761bruz-etched.glb",
      "model_3d_step": "ad5761bruz-etched.step",
      "model_3d_step_plain": "ad5761bruz.step",
      "lbr": "ad5761bruz.lbr"
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      "lcsc": "C650244",
      "digikey": "505-AD5761BRUZ-ND",
      "mouser": "584-AD5761BRUZ"
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    "distributor_check": {
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      "source": "Component Ocean /api/assign-pns",
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        "status": "found"
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      "mouser": {
        "pn": "584-AD5761BRUZ",
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    },
    "pins": [
      {
        "number": "1",
        "name": "ALERT",
        "type": "output",
        "description": "Active-low alert output asserted when die temperature exceeds approximately 150°C, on output short circuit or brownout, and during power-up or a full software/hardware reset until a control register write sets it high."
      },
      {
        "number": "2",
        "name": "CLEAR",
        "type": "input",
        "description": "Falling-edge clear input that sets the DAC register to zero-scale, midscale, or full-scale code (user selectable) and updates the DAC output; can be left floating due to an internal pull-up resistor."
      },
      {
        "number": "3",
        "name": "RESET",
        "type": "input",
        "description": "Active-low reset input that returns the device to its default power-on state with the output clamped to ground and the output buffer powered down; can be left floating due to an internal pull-up resistor."
      },
      {
        "number": "4",
        "name": "VREFIN",
        "type": "input",
        "description": "External reference voltage input; VREFIN = 2.5 V for specified performance."
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      {
        "number": "5",
        "name": "AGND",
        "type": "power_in",
        "description": "Ground reference for analog circuitry."
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      {
        "number": "6",
        "name": "VSS",
        "type": "power_in",
        "description": "Negative analog supply accepting −16.5 V to 0 V (connect to 0 V for unipolar output ranges) and must be decoupled to AGND."
      },
      {
        "number": "7",
        "name": "VOUT",
        "type": "output",
        "description": "Analog output voltage of the DAC; the output amplifier can directly drive a 2 kΩ, 1 nF load."
      },
      {
        "number": "8",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive analog supply of 4.75 V to 30 V for unipolar ranges or 4.75 V to 16.5 V for bipolar ranges, and must be decoupled to AGND."
      },
      {
        "number": "9",
        "name": "DNC",
        "type": "unconnected",
        "description": "Do not connect to this pin."
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      {
        "number": "10",
        "name": "SDO",
        "type": "output",
        "description": "Serial data output that clocks data from the serial register in daisy-chain or readback mode, changing on the rising edge of SCLK and valid on the falling edge."
      },
      {
        "number": "11",
        "name": "LDAC",
        "type": "input",
        "description": "Load DAC logic input that updates the DAC register and analog output; tied low it updates with the input register, held high it holds off the update until the falling edge, and it can be left floating due to an internal pull-up resistor."
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      {
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        "number": "13",
        "name": "SYNC",
        "type": "input",
        "description": "Active-low frame synchronization input; data is transferred in on SCLK falling edges while SYNC is low and latched on the rising edge of SYNC."
      },
      {
        "number": "14",
        "name": "SCLK",
        "type": "input",
        "description": "Serial clock input with data clocked into the input shift register on the falling edge, operating at up to 50 MHz."
      },
      {
        "number": "15",
        "name": "DVCC",
        "type": "power_in",
        "description": "Digital supply of 1.7 V to 5.5 V that sets the voltage at which the digital interface operates."
      },
      {
        "number": "16",
        "name": "DGND",
        "type": "power_in",
        "description": "Digital ground."
      }
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        "at": "2026-10-31T12:40:18"
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        "pages": 31,
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        "described": 16,
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        "refuses_to_fabricate": true
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      "Manufacturer": "Analog Devices",
      "Package": "TSSOP-16",
      "Category": "Data Converters",
      "Pins": "16"
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    "appearance": {
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        "quote": "ESD (Human Body Model) 4 kV Stresses at or above those listed under Absolute Maximum",
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          "name": "Offset Error",
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          "name": "Offset Error (0 V to 20 V, ±10 V)",
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          "name": "Input Leakage Current (SDI, SCLK, SYNC)",
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          "name": "Input Leakage Current (LDAC, CLEAR, RESET high)",
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        {
          "name": "Logic Output Voltage Low",
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        {
          "name": "VDD",
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        {
          "name": "VSS",
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          "name": "DVCC",
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          "name": "DICC",
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          "name": "Power Dissipation",
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