AD5689RARUZ-RL7

{
  "slug": "ad5689raruz-rl7",
  "version": "0.1.0",
  "type": "component",
  "description": "Analog Devices Digital To Analog Converters (DAC), TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "data acquisition",
    "ad5689raruz-rl7",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
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    "path": "docs/hero.png"
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  "files": [
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    "ad5689raruz-rl7.step",
    "ad5689raruz-rl7.lbr",
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    "docs/ad5689raruz-rl7-datasheet.pdf",
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  "component": {
    "mpn": "AD5689RARUZ-RL7",
    "manufacturer": "Analog Devices",
    "package": "TSSOP-16",
    "pin_count": 16,
    "category": "Data Acquisition",
    "subcategory": "Digital To Analog Converters (DAC)",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588884893635907584",
    "parts": {
      "symbol": "ad5689raruz-rl7.kicad_sym",
      "footprint": "ad5689raruz-rl7.kicad_mod",
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      "model_3d_step": "ad5689raruz-rl7-etched.step",
      "model_3d_step_plain": "ad5689raruz-rl7.step",
      "lbr": "ad5689raruz-rl7.lbr"
    },
    "distributor_links": {
      "lcsc": "C514225"
    },
    "distributor_check": {
      "checked_at": "2026-10-21T23:57:45Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "quota"
      },
      "mouser": {
        "pn": null,
        "status": "quota"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VREF",
        "type": "power_in",
        "description": "Reference voltage pin, which is the reference output when the internal reference is used and the reference input when an external reference is used; the default is reference output."
      },
      {
        "number": "2",
        "name": "NC",
        "type": "unconnected",
        "description": "No connect; do not connect to this pin."
      },
      {
        "number": "3",
        "name": "VOUTA",
        "type": "output",
        "description": "Analog output voltage from DAC A, with rail-to-rail output amplifier operation."
      },
      {
        "number": "4",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference point for all circuitry on the device."
      },
      {
        "number": "5",
        "name": "VDD",
        "type": "power_in",
        "description": "Power supply input operating from 2.7 V to 5.5 V, to be decoupled with a 10 µF capacitor in parallel with a 0.1 µF capacitor to GND."
      },
      {
        "number": "6",
        "name": "NC",
        "type": "unconnected",
        "description": "No connect; do not connect to this pin."
      },
      {
        "number": "7",
        "name": "VOUTB",
        "type": "output",
        "description": "Analog output voltage from DAC B, with rail-to-rail output amplifier operation."
      },
      {
        "number": "8",
        "name": "SDO",
        "type": "output",
        "description": "Serial data output used for daisy-chaining devices or for readback, with data transferred on the SCLK rising edge and valid on the falling edge."
      },
      {
        "number": "9",
        "name": "LDAC",
        "type": "input",
        "description": "Load DAC input operating asynchronously or synchronously; pulsing low updates either or both DAC registers when new input data is present, and the pin may be tied permanently low."
      },
      {
        "number": "10",
        "name": "GAIN",
        "type": "input",
        "description": "Gain select; tying to GND gives a 0 V to VREF output span and tying to VLOGIC gives a 0 V to 2 × VREF span."
      },
      {
        "number": "11",
        "name": "VLOGIC",
        "type": "power_in",
        "description": "Digital power supply with a voltage range of 1.62 V to 5.5 V."
      },
      {
        "number": "12",
        "name": "SCLK",
        "type": "input",
        "description": "Serial clock input; data is clocked into the input shift register on the falling edge at rates up to 50 MHz."
      },
      {
        "number": "13",
        "name": "SYNC",
        "type": "input",
        "description": "Active-low frame synchronization input; when SYNC goes low, data is transferred in on the falling edges of the next 24 clocks."
      },
      {
        "number": "14",
        "name": "SDIN",
        "type": "input",
        "description": "Serial data input to a 24-bit input shift register, clocked in on the falling edge of SCLK."
      },
      {
        "number": "15",
        "name": "RESET",
        "type": "input",
        "description": "Asynchronous, falling-edge-sensitive active-low reset that clears both DACs to zero scale or midscale per RSTSEL and must be kept low for a minimum time; LDAC pulses are ignored while low."
      },
      {
        "number": "16",
        "name": "RSTSEL",
        "type": "input",
        "description": "Power-on reset select; tying to GND powers both DACs up to zero scale and tying to VLOGIC powers both DACs up to midscale."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The extracted text of Figure 7 (TSSOP top view) lists pin labels in a different order than Table 7's; The datasheet does not give a KiCad electrical type for VREF; it is described as reference output by; The MPN AD5689RARUZ-RL7 is listed in the Ordering Guide as a 16-Lead TSSOP (RU-16), so the TSSOP pin"
        ],
        "pages_sent": 12,
        "cost_usd": 0.0193,
        "at": "2026-10-21T23:56:02"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588884893635907584",
        "pages": 28,
        "sha256": "130e141a164421b7",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
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        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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        "checked": "2026-10-21",
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        "sha256": "239d8c778e9c806f5c5c0d8aa2783664d40bb566d3217ca8938e6fcaa1d032db",
        "checked": "2026-10-21",
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}