component
AD5629RARUZ-1
Public Made by Adomby adom
Analog Devices Digital To Analog Converters (DACs), TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"category": "ADC/DAC/Data Conversion",
"subcategory": "Digital To Analog Converters (DACs)",
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"digikey": "505-AD5629RARUZ-1-ND",
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"pins": [
{
"number": "1",
"name": "LDAC",
"type": "input",
"description": "Pulsing this pin low allows any or all DAC registers to be updated if the input registers have new data, or the pin can be tied permanently low."
},
{
"number": "2",
"name": "A0",
"type": "input",
"description": "Address input that sets the least significant bit of the 7-bit slave address."
},
{
"number": "3",
"name": "VDD",
"type": "power_in",
"description": "Power supply input that operates from 2.7 V to 5.5 V and should be decoupled with a 10 µF capacitor in parallel with a 0.1 µF capacitor to GND."
},
{
"number": "4",
"name": "VOUTA",
"type": "output",
"description": "Analog output voltage from DAC A, with a rail-to-rail output amplifier."
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{
"number": "5",
"name": "VOUTC",
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"description": "Analog output voltage from DAC C, with a rail-to-rail output amplifier."
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{
"number": "6",
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{
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"description": "Analog output voltage from DAC G, with a rail-to-rail output amplifier."
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{
"number": "8",
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{
"number": "9",
"name": "CLR",
"type": "input",
"description": "Falling-edge-sensitive asynchronous clear input that ignores all LDAC pulses while low and loads zero scale, midscale or full scale from the CLR code register, defaulting to clearing the output to 0 V."
},
{
"number": "10",
"name": "VOUTH",
"type": "output",
"description": "Analog output voltage from DAC H, with a rail-to-rail output amplifier."
},
{
"number": "11",
"name": "VOUTF",
"type": "output",
"description": "Analog output voltage from DAC F, with a rail-to-rail output amplifier."
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{
"number": "12",
"name": "VOUTD",
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"description": "Analog output voltage from DAC D, with a rail-to-rail output amplifier."
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{
"number": "13",
"name": "VOUTB",
"type": "output",
"description": "Analog output voltage from DAC B, with a rail-to-rail output amplifier."
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{
"number": "14",
"name": "GND",
"type": "power_in",
"description": "Ground reference point for all circuitry on the part."
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{
"number": "15",
"name": "SDA",
"type": "bidirectional",
"description": "Bidirectional open-drain serial data line that clocks data into or out of the 32-bit input shift register and must be pulled to the supply with an external pull-up resistor."
},
{
"number": "16",
"name": "SCL",
"type": "input",
"description": "Serial clock line used with SDA to clock data into or out of the 32-bit input shift register."
}
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"name": "Offset Error",
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{
"name": "Output Voltage Range",
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{
"name": "Reference Input Range",
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"name": "Reference Current",
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"name": "Input Low Voltage",
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{
"name": "Input High Voltage",
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{
"name": "Reference Output Voltage (1.25 V option)",
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"conditions": "TA = 25°C",
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{
"name": "Supply Voltage (1.25 V reference option)",
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{
"name": "Supply Voltage",
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{
"name": "IDD (Normal Mode), internal reference off",
"symbol": "IDD",
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{
"name": "IDD (Normal Mode), internal reference on",
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{
"name": "IDD (All Power-Down Modes)",
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{
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"conditions": "¼ to ¾ scale settling to ±2 LSB",
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{
"name": "VDD to GND (absolute maximum)",
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{
"name": "Digital Input Voltage to GND",
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"source": "datasheet"
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{
"name": "VOUT to GND",
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{
"name": "VREFIN/VREFOUT to GND",
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{
"name": "Operating Temperature Range",
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"kind": "recommended_operating",
"unit": "°C",
"min": -40,
"typ": null,
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"conditions": "Industrial",
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{
"name": "Storage Temperature Range",
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"min": -65,
"typ": null,
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{
"name": "Junction Temperature",
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{
"name": "Reflow Soldering Peak Temperature",
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"conditions": "Pb free",
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"name": "Serial clock frequency (standard mode)",
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{
"name": "Serial clock frequency (fast mode)",
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{
"name": "DC Power Supply Rejection Ratio",
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{
"name": "DC Crosstalk (External Reference), full-scale output change",
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{
"name": "DC Crosstalk (External Reference), load current change",
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{
"name": "DC Crosstalk (External Reference), powering down",
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{
"name": "DC Crosstalk (Internal Reference), full-scale output change",
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{
"name": "DC Crosstalk (Internal Reference), load current change",
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{
"name": "Capacitive Load Stability",
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