# AD5625BRUZ

**Analog Devices** · Digital To Analog Converters (DACs) · TSSOP-14

AD5625BRUZ from Analog Devices, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | LDAC | input | Pulsing this pin low allows any or all DAC registers to be updated if the input registers have new data, or it can be tied permanently low. |
| 2 | ADDR1 | input | Three-state address input that sets the two least significant bits (A1, A0) of the 7-bit slave address. |
| 3 | VDD | power_in | Power supply input operable from 2.7 V to 5.5 V, to be decoupled with a 10 µF capacitor in parallel with a 0.1 µF capacitor to GND. |
| 4 | VOUTA | output | Analog output voltage from DAC A, with the output amplifier operating rail-to-rail. |
| 5 | VOUTC | output | Analog output voltage from DAC C, with the output amplifier operating rail-to-rail. |
| 6 | POR | input | Power-on reset pin: tying it to GND powers the device up to 0 V, and tying it to VDD powers it up to midscale. |
| 7 | VREFIN | input | Reference input pin for the AD5625, which has no internal reference and requires an external reference voltage to set the DAC output range. |
| 8 | ADDR2 | input | Three-state address input that sets bits A3 and A2 of the 7-bit slave address. |
| 9 | CLR | input | Falling-edge sensitive asynchronous clear input that loads zero scale to all input and DAC registers, clearing the output to 0 V. |
| 10 | VOUTD | output | Analog output voltage from DAC D, with the output amplifier operating rail-to-rail. |
| 11 | VOUTB | output | Analog output voltage from DAC B, with the output amplifier operating rail-to-rail. |
| 12 | GND | power_in | Ground reference point for all circuitry on the device. |
| 13 | SDA | bidirectional | Bidirectional open-drain serial data line that should be pulled to the supply with an external pull-up resistor. |
| 14 | SCL | input | Serial clock line used in conjunction with SDA to clock data into or out of the 16-bit input register. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | TSSOP-14 |
| Category | Data Converters |
| Pins | 14 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Power supply voltage VDD | VDD | 2.7 |  | 5.5 | V |  | 6 |
| Relative Accuracy | INL | -1 | 0.5 | 1 | LSB |  | 5 |
| Differential Nonlinearity | DNL | -0.25 |  | 0.25 | LSB | Guaranteed monotonic by design | 5 |
| Zero-Code Error |  |  | 2 | 10 | mV | All 0s loaded to DAC register | 5 |
| Offset Error |  | -10 | 1 | 10 | mV |  | 5 |
| Full-Scale Error |  | -0.5 | -0.1 | 0.5 | % FSR | All 1s loaded to DAC register | 5 |
| Gain Error |  | -1 | 0.1 | 1 | % FSR |  | 5 |
| Zero-Code Error Drift |  | -2 |  | 2 | µV/°C |  | 5 |
| Gain Temperature Coefficient |  | -2.5 |  | 2.5 | ppm Of FSR/°C |  | 5 |
| Reference Current |  |  | 210 | 260 | µA | VREF = VDD = 5.5 V | 5 |
| Input Current (ADDRx, CLR, LDAC, POR) | IIN | -1 |  | 1 | µA |  | 5 |
| Input Current (SDA, SCL) | IIN | -1 |  | 1 | µA |  | 5 |
| Floating-State Leakage Current |  | -1 |  | 1 | µA |  | 6 |
| Output Low Voltage (SDA) | VOL |  |  | 0.4 | V | ISINK = 3 mA | 6 |
| Output Low Voltage (SDA) | VOL |  |  | 0.6 | V | ISINK = 6 mA | 6 |
| Normal mode supply current, VDD 4.5 V to 5.5 V | IDD |  | 1 | 1.16 | mA | VIH = VDD, VIL = GND, full-scale loaded; VDD = 4.5 V to 5.5 V | 6 |
| Normal mode supply current, VDD 2.7 V to 3.6 V | IDD |  | 0.9 | 1.05 | mA | VIH = VDD, VIL = GND, full-scale loaded; VDD = 2.7 V to 3.6 V | 6 |
| All power-down modes supply current (TSSOP) | IDD |  | 0.48 | 1 | µA | VDD = 3.6 V to 5.5 V; VIH = VDD, VIL = GND (TSSOP) | 6 |
| VDD to GND |  | -0.3 |  | 7 | V |  | 10 |
| Operating Temperature Range, Industrial |  | -40 |  | 105 | °C | Industrial | 10 |
| Storage Temperature Range |  | -65 |  | 150 | °C |  | 10 |
| Junction Temperature (TJ maximum) | TJ |  |  | 150 | °C |  | 10 |
| θJA Thermal Impedance, TSSOP | θJA |  | 150.4 |  | °C/W | TSSOP | 10 |

## CAD (KiCad official)

- Symbol: `AD5625BRUZ`
- Footprint: `Package_SO:TSSOP-14_4.4x5mm_P0.65mm`
- 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files: `ad5625bruz-etched.step` / `ad5625bruz-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ad5625bruz.step` / `ad5625bruz.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Analog Devices datasheet](https://www.analog.com/media/en/technical-documentation/data-sheets/AD5625R_5645R_5665R_5625_5665.pdf) (35 pp, sha256 `92ae60d05500e362`, retrieved 2026-10-30, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ad5625bruz-datasheet.pdf)