main
Ray ad5262bruz20-rl7: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) dc650a9 1mo ago
{
  "schema_version": 1,
  "type": "component",
  "slug": "ad5262bruz20-rl7",
  "title": "AD5262BRUZ20-RL7",
  "brief": "Analog Devices Digital Potentiometers, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "data acquisition",
    "ad5262bruz20-rl7",
    "factory-2.0.0",
    "extractor-text"
  ],
  "component": {
    "mpn": "AD5262BRUZ20-RL7",
    "manufacturer": "Analog Devices",
    "package": "TSSOP-16",
    "pin_count": 16,
    "category": "Data Acquisition",
    "subcategory": "Digital Potentiometers",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588886453523136512",
    "parts": {
      "symbol": "ad5262bruz20-rl7.kicad_sym",
      "footprint": "ad5262bruz20-rl7.kicad_mod",
      "model_3d": "ad5262bruz20-rl7-etched.glb",
      "model_3d_plain": "ad5262bruz20-rl7.glb",
      "model_3d_step": "ad5262bruz20-rl7-etched.step",
      "model_3d_step_plain": "ad5262bruz20-rl7.step",
      "lbr": "ad5262bruz20-rl7.lbr"
    },
    "distributor_links": {
      "lcsc": "C578157"
    },
    "pins": [
      {
        "number": "1",
        "name": "SDO",
        "type": "tri_state",
        "description": "Serial data output; open-drain transistor requires external pull-up resistor for daisy-chain operation."
      },
      {
        "number": "2",
        "name": "A1",
        "type": "passive",
        "description": "End A terminal of RDAC 1; voltage range VSS to VDD."
      },
      {
        "number": "3",
        "name": "W1",
        "type": "passive",
        "description": "Wiper (cursor) terminal of RDAC 1 selected when address bit A0 = 0; voltage range VSS to VDD."
      },
      {
        "number": "4",
        "name": "B1",
        "type": "passive",
        "description": "End B terminal of RDAC 1; voltage range VSS to VDD."
      },
      {
        "number": "5",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive power supply; rated 5 V or 15 V operation with |VDD| + |VSS| ≤ 15 V."
      },
      {
        "number": "6",
        "name": "SHDN",
        "type": "input",
        "description": "Active-low shutdown control input; opens end A and connects wiper W to end B for minimal quiescent current."
      },
      {
        "number": "7",
        "name": "CLK",
        "type": "input",
        "description": "Serial clock input, rising-edge triggered; maximum frequency 25 MHz for SPI-compatible interface."
      },
      {
        "number": "8",
        "name": "SDI",
        "type": "input",
        "description": "Serial data input; MSB-first 9-bit transfers with address bit A0 followed by 8 data bits for SPI interface."
      },
      {
        "number": "9",
        "name": "CS",
        "type": "input",
        "description": "Chip select input, active-low; data latches to target RDAC register on rising edge based on address bit A0."
      },
      {
        "number": "10",
        "name": "PR",
        "type": "input",
        "description": "Active-low preset input; forces all RDAC registers to 0x80 to set cursor to midscale position."
      },
      {
        "number": "11",
        "name": "GND",
        "type": "power_in",
        "description": "Digital ground reference; connects to PCB common ground for digital circuit return path."
      },
      {
        "number": "12",
        "name": "VSS",
        "type": "power_in",
        "description": "Negative power supply; rated 0 V or -5 V operation with |VDD| + |VSS| < 15 V."
      },
      {
        "number": "13",
        "name": "VL",
        "type": "power_in",
        "description": "Logic supply voltage; 2.7 V to 5.5 V range; must equal control microcontroller logic voltage level."
      },
      {
        "number": "14",
        "name": "B2",
        "type": "passive",
        "description": "End B terminal of RDAC 2; voltage range VSS to VDD."
      },
      {
        "number": "15",
        "name": "W2",
        "type": "passive",
        "description": "Wiper (cursor) terminal of RDAC 2 selected when address bit A0 = 1; voltage range VSS to VDD."
      },
      {
        "number": "16",
        "name": "A2",
        "type": "passive",
        "description": "End A terminal of RDAC 2; voltage range VSS to VDD."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.2",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.2",
        "primary_model": "claude-haiku-4-5-20251001",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-4-6",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [],
        "pages_sent": 24,
        "cost_usd": 0.2764,
        "at": "2026-09-18T00:01:43"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588886453523136512",
        "pages": 24,
        "sha256": "93e68d0836e617e1",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "ad5262bruz20-rl7.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          5.0,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "6ad5e98224d02a427d9a6b929a28dbc158b9925fba5adec12db05079f1016948",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ad5262bruz20-rl7-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          5.0,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "4e8368ac901e8f14011ead2ecca78c979621aaff7b00acd93f05fe7c94976817",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Analog Devices",
      "Package": "TSSOP-16",
      "Category": "Data Acquisition",
      "Pins": "16"
    }
  },
  "variants": [],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "ad5262bruz20-rl7"
  ],
  "discovery_pitch": "AD5262BRUZ20-RL7 (Analog Devices) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "ad5262bruz20-rl7.kicad_sym",
    "ad5262bruz20-rl7.kicad_mod",
    "ad5262bruz20-rl7.glb",
    "ad5262bruz20-rl7.step",
    "ad5262bruz20-rl7.lbr",
    "docs/hero.png",
    "docs/ad5262bruz20-rl7-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "updated_at": "2026-09-24T15:33:29.763Z"
}