component
AD5206BRUZ50-REEL7
Public Made by Adomby adom
Analog Devices Digital Potentiometers, TSSOP-24. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"title": "AD5206BRUZ50-REEL7",
"brief": "Analog Devices Digital Potentiometers, TSSOP-24. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
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"manufacturer": "Analog Devices",
"package": "TSSOP-24",
"pin_count": 24,
"category": "ADC/DAC/Data Conversion",
"subcategory": "Digital Potentiometers",
"datasheet": "https://www.analog.com/media/en/technical-documentation/data-sheets/AD5204_5206.pdf",
"parts": {
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"digikey": "505-AD5206BRUZ50-REEL7TR-ND",
"mouser": "584-AD5206BRUZ50-R7"
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"source": "Component Ocean /api/assign-pns",
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"pins": [
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"number": "1",
"name": "A6",
"type": "passive",
"description": "Terminal A of RDAC 6, a resistor terminal with voltage range VSS to VDD."
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{
"number": "2",
"name": "W6",
"type": "passive",
"description": "Wiper of RDAC 6, addressed as 101 (decoded per Table 12) and bounded by the VSS to VDD resistor-terminal voltage range."
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{
"number": "3",
"name": "B6",
"type": "passive",
"description": "Terminal B of RDAC 6, a resistor terminal with voltage range VSS to VDD."
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{
"number": "4",
"name": "GND",
"type": "power_in",
"description": "Digital ground reference for the logic levels of CS, SDI, and CLK."
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{
"number": "5",
"name": "CS",
"type": "input",
"description": "Active-low chip select; when CS returns high, the serial register data is decoded by the address bits and loaded into the target RDAC latch."
},
{
"number": "6",
"name": "VDD",
"type": "power_in",
"description": "Positive power supply specified for operation at both 3 V and 5 V, with |VDD| + |VSS| < 5.5 V."
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{
"number": "7",
"name": "SDI",
"type": "input",
"description": "Serial data input; data is entered MSB first."
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{
"number": "8",
"name": "CLK",
"type": "input",
"description": "Serial clock input, positive-edge triggered."
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{
"number": "9",
"name": "VSS",
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"description": "Negative power supply specified for operation at both 0 V and −2.7 V, with |VDD| + |VSS| < 5.5 V."
},
{
"number": "10",
"name": "B5",
"type": "passive",
"description": "Terminal B of RDAC 5, a resistor terminal with voltage range VSS to VDD."
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{
"number": "11",
"name": "W5",
"type": "passive",
"description": "Wiper of RDAC 5, addressed as 100 (decoded per Table 12) and bounded by the VSS to VDD resistor-terminal voltage range."
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{
"number": "12",
"name": "A5",
"type": "passive",
"description": "Terminal A of RDAC 5, a resistor terminal with voltage range VSS to VDD."
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{
"number": "13",
"name": "B3",
"type": "passive",
"description": "Terminal B of RDAC 3, a resistor terminal with voltage range VSS to VDD."
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{
"number": "14",
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"type": "passive",
"description": "Wiper of RDAC 3, addressed as 010 (decoded per Table 12) and bounded by the VSS to VDD resistor-terminal voltage range."
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{
"number": "15",
"name": "A3",
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"description": "Terminal A of RDAC 3, a resistor terminal with voltage range VSS to VDD."
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{
"number": "16",
"name": "B1",
"type": "passive",
"description": "Terminal B of RDAC 1, a resistor terminal with voltage range VSS to VDD."
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{
"number": "17",
"name": "W1",
"type": "passive",
"description": "Wiper of RDAC 1, addressed as 000 (decoded per Table 12) and bounded by the VSS to VDD resistor-terminal voltage range."
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{
"number": "18",
"name": "A1",
"type": "passive",
"description": "Terminal A of RDAC 1, a resistor terminal with voltage range VSS to VDD."
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{
"number": "19",
"name": "A2",
"type": "passive",
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{
"number": "20",
"name": "W2",
"type": "passive",
"description": "Wiper of RDAC 2, addressed as 001 (decoded per Table 12) and bounded by the VSS to VDD resistor-terminal voltage range."
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{
"number": "21",
"name": "B2",
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"description": "Terminal B of RDAC 2, a resistor terminal with voltage range VSS to VDD."
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{
"number": "22",
"name": "A4",
"type": "passive",
"description": "Terminal A of RDAC 4, a resistor terminal with voltage range VSS to VDD."
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{
"number": "23",
"name": "W4",
"type": "passive",
"description": "Wiper of RDAC 4, addressed as 011 (decoded per Table 12) and bounded by the VSS to VDD resistor-terminal voltage range."
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{
"number": "24",
"name": "B4",
"type": "passive",
"description": "Terminal B of RDAC 4, a resistor terminal with voltage range VSS to VDD."
}
],
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"extractor": "extract_pins 0.3",
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"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: MPN AD5206BRUZ50-REEL7 is listed in the Ordering Guide (page 16) as a 24-Lead TSSOP reel, package op; Table 7 prints the wiper addresses with a subscript that appears as plain digits (for example '1012'; The AD5206 pin table (Table 7) does not list PR or SHDN pins, and the datasheet notes these belong t"
],
"pages_sent": 16,
"cost_usd": 0.0823,
"at": "2026-10-30T20:55:25"
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"datasheet": {
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"pages": 16,
"sha256": "d394eb4fd3679cbf",
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{
"name": "Full-Scale Error",
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"max": 0,
"conditions": "Code = full scale",
"source_page": 3,
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{
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"conditions": "Code = zero scale",
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{
"name": "Shutdown Current",
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"unit": "μA",
"min": null,
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"max": 5,
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{
"name": "Common-Mode Leakage",
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"min": null,
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"max": 1,
"conditions": "VA = VB = VW = 0, VDD = +2.7 V, VSS = −2.5 V",
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{
"name": "Input Logic High",
"symbol": "VIH",
"kind": "electrical",
"unit": "V",
"min": 2.4,
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"max": null,
"conditions": "VDD = 5 V",
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{
"name": "Input Logic High",
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"min": 2.1,
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"max": null,
"conditions": "VDD = 3 V",
"source_page": 3,
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{
"name": "Input Logic Low",
"symbol": "VIL",
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"min": null,
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{
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"unit": "V",
"min": 4.9,
"typ": null,
"max": null,
"conditions": "RPULL–UP = 1 kΩ to 5 V",
"source_page": 3,
"source": "datasheet"
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{
"name": "Output Logic Low",
"symbol": "VOL",
"kind": "electrical",
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"min": null,
"typ": null,
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"conditions": "IOL = 1.6 mA, VLOGIC = 5 V",
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{
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"conditions": "VIN = 0 V or 5 V",
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{
"name": "Power Single-Supply Range",
"symbol": "VDD",
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"min": 2.7,
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{
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"conditions": "VIH = 5 V or VIL = 0 V",
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{
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"symbol": "ISS",
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"min": null,
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"max": 60,
"conditions": "VSS = −2.5 V, VDD = +2.7 V",
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{
"name": "Power Supply Sensitivity",
"symbol": "PSS",
"kind": "electrical",
"unit": "%/%",
"min": null,
"typ": 0.0002,
"max": 0.005,
"conditions": "ΔVDD = 5 V ± 10%",
"source_page": 3,
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{
"name": "Input Clock Pulse Width",
"symbol": "tCH, tCL",
"kind": "timing",
"unit": "ns",
"min": 20,
"typ": null,
"max": null,
"conditions": "Clock level high or low",
"source_page": 4,
"source": "datasheet"
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{
"name": "Data Setup Time",
"symbol": "tDS",
"kind": "timing",
"unit": "ns",
"min": 5,
"typ": null,
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{
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"kind": "timing",
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"min": 5,
"typ": null,
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"conditions": "",
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{
"name": "CLK-to-SDO Propagation Delay",
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"unit": "ns",
"min": null,
"typ": null,
"max": 150,
"conditions": "RL = 2 kΩ, CL < 20 pF",
"source_page": 4,
"source": "datasheet"
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{
"name": "Setup Time",
"symbol": "tCSS",
"kind": "timing",
"unit": "ns",
"min": 15,
"typ": null,
"max": null,
"conditions": "",
"source_page": 4,
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{
"name": "CS High Pulse Width",
"symbol": "tCSW",
"kind": "timing",
"unit": "ns",
"min": 40,
"typ": null,
"max": null,
"conditions": "",
"source_page": 4,
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{
"name": "Reset Pulse Width",
"symbol": "tRS",
"kind": "timing",
"unit": "ns",
"min": 90,
"typ": null,
"max": null,
"conditions": "",
"source_page": 4,
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{
"name": "CLK Fall to CS Fall Setup",
"symbol": "tCSH0",
"kind": "timing",
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"min": 0,
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{
"name": "CLK Fall to CS Rise Hold Time",
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"min": 0,
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{
"name": "CS Rise to Clock Rise Setup",
"symbol": "tCS1",
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"min": 10,
"typ": null,
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"source_page": 4,
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{
"name": "VDD to GND",
"symbol": "VDD",
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"unit": "V",
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"typ": null,
"max": 7,
"conditions": "",
"source_page": 6,
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{
"name": "VSS to GND",
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"unit": "V",
"min": -7,
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{
"name": "VDD to VSS",
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"min": null,
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{
"name": "Pulsed Terminal Current",
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{
"name": "Continuous Terminal Current",
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"min": -2.5,
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"conditions": "Continuous, 50 kΩ and 100 kΩ end-to-end resistance",
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{
"name": "Digital Input and Output Voltage to GND",
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