# AD5161BRMZ50-RL7

**Analog Devices** · Digital Potentiometers · MSOP-10

AD5161BRMZ50-RL7 from Analog Devices, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A | passive | A terminal of the variable resistor; terminal voltages are specified from GND to VDD and terminal current is limited to ±20 mA (IMAX). |
| 2 | B | passive | B terminal of the variable resistor; terminal voltages are specified from GND to VDD and terminal current is limited to ±20 mA (IMAX). |
| 3 | CS/AD0 | input | Chip Select input, active low; data is loaded into the DAC register when CS returns high, and in I2C mode this pin is programmable address bit AD0 for multiple-package decoding. |
| 4 | SDO/NC | output | Serial Data Output is an open-drain transistor that requires an external pull-up resistor, and this pin is a no connect (NC) in the alternate configuration. |
| 5 | SDI/SDA | bidirectional | Serial Data Input in SPI mode and Serial Data Input/Output (SDA) in I2C mode. |
| 6 | CLK/SCL | input | Serial clock input, positive-edge triggered (SCL in I2C mode). |
| 7 | GND | power_in | Digital ground. |
| 8 | DIS | input | Digital Interface Select: SPI mode when DIS = 0, I2C mode when DIS = 1. |
| 9 | VDD | power_in | Positive power supply, specified from 2.7 V to 5.5 V (page 3 power supply range). |
| 10 | W | passive | W wiper terminal of the variable resistor; terminal voltages are specified from GND to VDD and terminal current is limited to ±20 mA (IMAX). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | MSOP-10 |
| Category | ADC/DAC/Data Conversion |
| Pins | 10 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Nominal Resistor Tolerance | ∆RAB | -30 |  | 30 | % | TA = 25°C | 4 |
| Resistor Differential Nonlinearity | R-DNL | -1 | 0.1 | 1 | LSB | RWB, VA = no connect | 4 |
| Resistor Integral Nonlinearity | R-INL | -2 | 0.25 | 2 | LSB | RWB, VA = no connect | 4 |
| Wiper Resistance | RW | 50 |  | 120 | Ω | VDD = 5 V | 4 |
| Differential Nonlinearity | DNL | -1 | 0.1 | 1 | LSB |  | 4 |
| Integral Nonlinearity | INL | -1 | 0.3 | 1 | LSB |  | 4 |
| Full-Scale Error | VWFSE | -3 | -1 | 0 | LSB | Code = 0xFF | 4 |
| Zero-Scale Error | VWZSE | 0 | 1 | 3 | LSB | Code = 0x00 | 4 |
| Input Logic High | VIH | 2.4 |  |  | V |  | 4 |
| Input Logic Low | VIL |  |  | 0.8 | V |  | 4 |
| Input Logic High | VIH | 2.1 |  |  | V | VDD = 3 V | 4 |
| Input Logic Low | VIL |  |  | 0.6 | V | VDD = 3 V | 4 |
| Input Current | IIL | -1 |  | 1 | µA | VIN = 0 V or 5 V | 4 |
| Power Supply Range | VDD RANGE | 2.7 |  | 5.5 | V |  | 4 |
| Supply Current | IDD |  | 3 | 8 | µA | VIH = 5 V or VIL = 0 V | 4 |
| Shutdown Supply Current | IDD_SD |  | 0.01 | 1 | µA | VDD = 5.5 V | 4 |
| Power Supply Sensitivity | PSS | -0.05 | 0.02 | 0.05 | %/% | ∆VDD = +5 V ± 10%, Code = Midscale | 4 |
| Nominal Resistance (50 kΩ option) | RAB |  | 50 |  | kΩ | Ordering guide, AD5161BRMZ50-RL7 | 19 |
| Resistance Temperature Coefficient | ∆RAB/∆T |  | 45 |  | ppm/°C | VAB = VDD, Wiper = no connect | 4 |
| Voltage Divider Temperature Coefficient | ∆VW/∆T |  | 15 |  | ppm/°C | Code = 0x80 | 4 |
| Clock Frequency | fCLK |  |  | 25 | MHz |  | 5 |
| Input Clock Pulsewidth | tCH, tCL | 20 |  |  | ns | Clock level high or low | 5 |
| Data Setup Time | tDS | 5 |  |  | ns |  | 5 |
| Data Hold Time | tDH | 5 |  |  | ns |  | 5 |
| CS Setup Time | tCSS | 15 |  |  | ns |  | 5 |
| CS High Pulsewidth | tCSW | 40 |  |  | ns |  | 5 |
| CLK Fall to CS Fall Hold Time | tCSH0 | 0 |  |  | ns |  | 5 |
| CLK Fall to CS Rise Hold Time | tCSH1 | 0 |  |  | ns |  | 5 |
| CS Rise to Clock Rise Setup | tCS1 | 10 |  |  | ns |  | 5 |
| SCL Clock Frequency | fSCL |  |  | 400 | kHz |  | 5 |
| Bus Free Time between STOP and START | tBUF | 1.3 |  |  | µs |  | 5 |
| Hold Time (Repeated START) | tHD;STA | 0.6 |  |  | µs |  | 5 |
| Low Period of SCL Clock | tLOW | 1.3 |  |  | µs |  | 5 |
| High Period of SCL Clock | tHIGH | 0.6 |  | 50 | µs |  | 5 |
| Setup Time for Repeated START Condition | tSU;STA | 0.6 |  |  | µs |  | 5 |
| Data Hold Time | tHD;DAT | 0.9 |  |  | µs |  | 5 |
| Data Setup Time | tSU;DAT | 100 |  |  | ns |  | 5 |
| Fall Time of Both SDA and SCL Signals | tF |  |  | 300 | ns |  | 5 |
| Rise Time of Both SDA and SCL Signals | tR |  |  | 300 | ns |  | 5 |
| Setup Time for STOP Condition | tSU;STO | 0.6 |  |  | µs |  | 5 |
| VDD to GND | VDD | -0.3 |  | 7 | V | TA = 25°C | 6 |
| Maximum Terminal Current | IMAX1 | -20 |  | 20 | mA | TA = 25°C | 6 |
| Digital Inputs and Output Voltage to GND |  | 0 |  | 7 | V | TA = 25°C | 6 |
| Operating Temperature Range |  | -40 |  | 125 | °C |  | 6 |
| Maximum Junction Temperature | TJMAX |  |  | 150 | °C |  | 6 |
| Storage Temperature Range |  | -65 |  | 150 | °C |  | 6 |
| Lead Temperature (Soldering) |  |  |  | 300 | °C | Soldering, 10 sec | 6 |
| Thermal Resistance, Junction-to-Ambient | θJA |  | 200 |  | °C/W | 10-Lead MSOP | 6 |

## CAD (KiCad official)

- Symbol: `AD5161BRMZ50-RL7`
- Footprint: `Package_SO:MSOP-10_3x3mm_P0.5mm`
- 3D model: MSOP-10 (KiCad packages3D, STEP)
- 3D model files: `ad5161brmz50-rl7-etched.step` / `ad5161brmz50-rl7-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ad5161brmz50-rl7.step` / `ad5161brmz50-rl7.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Analog Devices datasheet](https://www.analog.com/media/en/technical-documentation/data-sheets/AD5161.pdf) (20 pp, sha256 `b974abd28e91a958`, retrieved 2026-10-31, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ad5161brmz50-rl7-datasheet.pdf)