component
AD5161BRMZ50-RL7
Public Made by Adomby adom
Analog Devices Digital Potentiometers, MSOP-10. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.md+101ad5161brmz50-rl7-etched.glbad5161brmz50-rl7-hero.glbad5161brmz50-rl7-hero.overlay.json+304ad5161brmz50-rl7.glbad5161brmz50-rl7.kicad_mod+210ad5161brmz50-rl7.kicad_sym+53ad5161brmz50-rl7.lbr+136ad5161brmz50-rl7.step+7137docs/ad5161brmz50-rl7-datasheet.pdfdocs/hero.pngpackage.json+254page.json+260viewers/footprint.html+1viewers/symbol.html+1README.mdadded+101@@ -0,0 +1,101 @@+# AD5161BRMZ50-RL7++**Analog Devices** · Digital Potentiometers · MSOP-10++AD5161BRMZ50-RL7 from Analog Devices, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | A | passive | A terminal of the variable resistor; terminal voltages are specified from GND to VDD and terminal current is limited to ±20 mA (IMAX). |+| 2 | B | passive | B terminal of the variable resistor; terminal voltages are specified from GND to VDD and terminal current is limited to ±20 mA (IMAX). |+| 3 | CS/AD0 | input | Chip Select input, active low; data is loaded into the DAC register when CS returns high, and in I2C mode this pin is programmable address bit AD0 for multiple-package decoding. |+| 4 | SDO/NC | output | Serial Data Output is an open-drain transistor that requires an external pull-up resistor, and this pin is a no connect (NC) in the alternate configuration. |+| 5 | SDI/SDA | bidirectional | Serial Data Input in SPI mode and Serial Data Input/Output (SDA) in I2C mode. |+| 6 | CLK/SCL | input | Serial clock input, positive-edge triggered (SCL in I2C mode). |+| 7 | GND | power_in | Digital ground. |+| 8 | DIS | input | Digital Interface Select: SPI mode when DIS = 0, I2C mode when DIS = 1. |+| 9 | VDD | power_in | Positive power supply, specified from 2.7 V to 5.5 V (page 3 power supply range). |+| 10 | W | passive | W wiper terminal of the variable resistor; terminal voltages are specified from GND to VDD and terminal current is limited to ±20 mA (IMAX). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Analog Devices |+| Package | MSOP-10 |+| Category | ADC/DAC/Data Conversion |+| Pins | 10 |++## Electrical characteristics++Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).++| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |+|---|---|---|---|---|---|---|---|+| Nominal Resistor Tolerance | ∆RAB | -30 | | 30 | % | TA = 25°C | 4 |+| Resistor Differential Nonlinearity | R-DNL | -1 | 0.1 | 1 | LSB | RWB, VA = no connect | 4 |+| Resistor Integral Nonlinearity | R-INL | -2 | 0.25 | 2 | LSB | RWB, VA = no connect | 4 |+| Wiper Resistance | RW | 50 | | 120 | Ω | VDD = 5 V | 4 |+| Differential Nonlinearity | DNL | -1 | 0.1 | 1 | LSB | | 4 |+| Integral Nonlinearity | INL | -1 | 0.3 | 1 | LSB | | 4 |+| Full-Scale Error | VWFSE | -3 | -1 | 0 | LSB | Code = 0xFF | 4 |+| Zero-Scale Error | VWZSE | 0 | 1 | 3 | LSB | Code = 0x00 | 4 |+| Input Logic High | VIH | 2.4 | | | V | | 4 |+| Input Logic Low | VIL | | | 0.8 | V | | 4 |+| Input Logic High | VIH | 2.1 | | | V | VDD = 3 V | 4 |+| Input Logic Low | VIL | | | 0.6 | V | VDD = 3 V | 4 |+| Input Current | IIL | -1 | | 1 | µA | VIN = 0 V or 5 V | 4 |+| Power Supply Range | VDD RANGE | 2.7 | | 5.5 | V | | 4 |+| Supply Current | IDD | | 3 | 8 | µA | VIH = 5 V or VIL = 0 V | 4 |+| Shutdown Supply Current | IDD_SD | | 0.01 | 1 | µA | VDD = 5.5 V | 4 |+| Power Supply Sensitivity | PSS | -0.05 | 0.02 | 0.05 | %/% | ∆VDD = +5 V ± 10%, Code = Midscale | 4 |+| Nominal Resistance (50 kΩ option) | RAB | | 50 | | kΩ | Ordering guide, AD5161BRMZ50-RL7 | 19 |+| Resistance Temperature Coefficient | ∆RAB/∆T | | 45 | | ppm/°C | VAB = VDD, Wiper = no connect | 4 |+| Voltage Divider Temperature Coefficient | ∆VW/∆T | | 15 | | ppm/°C | Code = 0x80 | 4 |+| Clock Frequency | fCLK | | | 25 | MHz | | 5 |+| Input Clock Pulsewidth | tCH, tCL | 20 | | | ns | Clock level high or low | 5 |+| Data Setup Time | tDS | 5 | | | ns | | 5 |+| Data Hold Time | tDH | 5 | | | ns | | 5 |+| CS Setup Time | tCSS | 15 | | | ns | | 5 |+| CS High Pulsewidth | tCSW | 40 | | | ns | | 5 |+| CLK Fall to CS Fall Hold Time | tCSH0 | 0 | | | ns | | 5 |+| CLK Fall to CS Rise Hold Time | tCSH1 | 0 | | | ns | | 5 |+| CS Rise to Clock Rise Setup | tCS1 | 10 | | | ns | | 5 |+| SCL Clock Frequency | fSCL | | | 400 | kHz | | 5 |+| Bus Free Time between STOP and START | tBUF | 1.3 | | | µs | | 5 |+| Hold Time (Repeated START) | tHD;STA | 0.6 | | | µs | | 5 |+| Low Period of SCL Clock | tLOW | 1.3 | | | µs | | 5 |+| High Period of SCL Clock | tHIGH | 0.6 | | 50 | µs | | 5 |+| Setup Time for Repeated START Condition | tSU;STA | 0.6 | | | µs | | 5 |+| Data Hold Time | tHD;DAT | 0.9 | | | µs | | 5 |+| Data Setup Time | tSU;DAT | 100 | | | ns | | 5 |+| Fall Time of Both SDA and SCL Signals | tF | | | 300 | ns | | 5 |+| Rise Time of Both SDA and SCL Signals | tR | | | 300 | ns | | 5 |+| Setup Time for STOP Condition | tSU;STO | 0.6 | | | µs | | 5 |+| VDD to GND | VDD | -0.3 | | 7 | V | TA = 25°C | 6 |+| Maximum Terminal Current | IMAX1 | -20 | | 20 | mA | TA = 25°C | 6 |+| Digital Inputs and Output Voltage to GND | | 0 | | 7 | V | TA = 25°C | 6 |+| Operating Temperature Range | | -40 | | 125 | °C | | 6 |+| Maximum Junction Temperature | TJMAX | | | 150 | °C | | 6 |+| Storage Temperature Range | | -65 | | 150 | °C | | 6 |+| Lead Temperature (Soldering) | | | | 300 | °C | Soldering, 10 sec | 6 |+| Thermal Resistance, Junction-to-Ambient | θJA | | 200 | | °C/W | 10-Lead MSOP | 6 |++## CAD (KiCad official)++- Symbol: `AD5161BRMZ50-RL7`+- Footprint: `Package_SO:MSOP-10_3x3mm_P0.5mm`+- 3D model: MSOP-10 (KiCad packages3D, STEP)+- 3D model files: `ad5161brmz50-rl7-etched.step` / `ad5161brmz50-rl7-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ad5161brmz50-rl7.step` / `ad5161brmz50-rl7.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Analog Devices datasheet](https://www.analog.com/media/en/technical-documentation/data-sheets/AD5161.pdf) (20 pp, sha256 `b974abd28e91a958`, retrieved 2026-10-31, tier: manufacturer)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ad5161brmz50-rl7-datasheet.pdf)
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https://github.com/KiCad/kicad-packages3D/blob/master/LICENSE.md for further clarification of the exception.+ * Disclaimer of Warranties and Limitation of Liability.+ * These libraries are provided in the hope that they will be useful, but are provided without warranty of any kind, express or implied.+ * *USE 3D CAD DATA AT YOUR OWN RISK*+ * *DO NOT RELY UPON ANY INFORMATION FOUND HERE WITHOUT INDEPENDENT VERIFICATION.*+ * + */++FILE_DESCRIPTION(+/* description */ ('model of MSOP-10_3x3mm_P0.5mm'),+/* implementation_level */ '2;1');++FILE_NAME(+/* name */ 'MSOP-10_3x3mm_P0.5mm.step',+/* time_stamp */ '2017-12-18T01:39:43',+/* author */ ('kicad StepUp','ksu'),+/* organization */ ('FreeCAD'),+/* preprocessor_version */ 'OCC',+/* originating_system */ 'kicad StepUp',+/* authorisation */ '');++FILE_SCHEMA(('AUTOMOTIVE_DESIGN { 1 0 10303 214 1 1 1 1 }'));+ENDSEC;++DATA;+#1 = APPLICATION_PROTOCOL_DEFINITION('international standard',+'automotive_design',2000,#2);+#2 = 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package.jsonadded+254@@ -0,0 +1,254 @@+{+ "slug": "ad5161brmz50-rl7",+ "version": "0.1.0",+ "type": "component",+ "description": "Analog Devices Digital Potentiometers, MSOP-10. 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Types were chosen as output an; Voltage and current limits for the A, B and W terminals (GND to VDD, ±20 mA) come from the Table 1 a; The datasheet's ordering guide gives the 50 kΩ RAB option for AD5161BRMZ50-RL7 on the same 10-lead M"+ ],+ "pages_sent": 7,+ "cost_usd": 0.0387,+ "at": "2026-10-31T03:37:20"+ },+ "datasheet": {+ "url": "https://www.analog.com/media/en/technical-documentation/data-sheets/AD5161.pdf",+ "pages": 20,+ "sha256": "b974abd28e91a958",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 10,+ "described": 10,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "ad5161brmz50-rl7.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 4.9,+ 3.0,+ 0.95+ ],+ "zmin_mm": -0.0,+ "centre_offset_mm": 0.0,+ "footprint_binding": "identity",+ "sha256": "04cd1b024ea547d1988505510f57a28cea7708cb1a89243842764e7f8d280098",+ "checked": "2026-10-31",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "ad5161brmz50-rl7-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 4.9,+ 3.0,+ 0.95+ ],+ "zmin_mm": -0.0,+ "centre_offset_mm": 0.0,+ "footprint_binding": "identity",+ "sha256": "49fe07a40c898cc6c8bf76c4e5479a343960e065e616093eb469b79be1ab98b0",+ "checked": "2026-10-31",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ],+ "package_dims": {+ "package_code": "RM-10",+ "source_page": 19,+ "D": {+ "nom_mm": 3.0,+ "range_mm": [+ 2.9,+ 3.1+ ]+ },+ "E1": {+ "nom_mm": 3.0,+ "range_mm": [+ 2.9,+ 3.1+ ]+ },+ "E": {+ "nom_mm": 4.9,+ "range_mm": [+ 4.65,+ 5.15+ ]+ },+ "e": {+ "nom_mm": 0.5,+ "range_mm": [+ null,+ null+ ]+ },+ "A": {+ "nom_mm": 1.1,+ "range_mm": [+ null,+ 1.1+ ]+ },+ "source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",+ "model_check": {+ "file": "ad5161brmz50-rl7.step",+ "verdict": "PASS",+ "reasons": [+ "height and body within the datasheet's package drawing"+ ],+ "by": "factory/package_fit.py"+ }+ }+ }+}
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Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "adc-dac-data conversion",+ "ad5161brmz50-rl7",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "ad5161brmz50-rl7.kicad_sym",+ "ad5161brmz50-rl7.kicad_mod",+ "ad5161brmz50-rl7.glb",+ "ad5161brmz50-rl7.step",+ "ad5161brmz50-rl7.lbr",+ "docs/hero.png",+ "docs/ad5161brmz50-rl7-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "ad5161brmz50-rl7-hero.glb",+ "ad5161brmz50-rl7-hero.overlay.json",+ "ad5161brmz50-rl7-etched.glb"+ ],+ "component": {+ "mpn": "AD5161BRMZ50-RL7",+ "manufacturer": "Analog Devices",+ "package": "MSOP-10",+ "pin_count": 10,+ "category": "ADC/DAC/Data Conversion",+ "subcategory": "Digital Potentiometers",+ "datasheet": "https://www.analog.com/media/en/technical-documentation/data-sheets/AD5161.pdf",+ "parts": {+ "symbol": "ad5161brmz50-rl7.kicad_sym",+ "footprint": "ad5161brmz50-rl7.kicad_mod",+ "model_3d": "ad5161brmz50-rl7-hero.glb",+ "model_3d_plain": "ad5161brmz50-rl7-etched.glb",+ "model_3d_step": "ad5161brmz50-rl7-etched.step",+ "model_3d_step_plain": "ad5161brmz50-rl7.step",+ "lbr": "ad5161brmz50-rl7.lbr"+ },+ "distributor_links": {+ "lcsc": "C649287",+ "digikey": "AD5161BRMZ50-RL7TR-ND",+ "mouser": "584-AD5161BRMZ50-R7"+ },+ "distributor_check": {+ "checked_at": "2026-10-31T03:39:33Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "AD5161BRMZ50-RL7TR-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "584-AD5161BRMZ50-R7",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "A",+ "type": "passive",+ "description": "A terminal of the variable resistor; terminal voltages are specified from GND to VDD and terminal current is limited to ±20 mA (IMAX)."+ },+ {+ "number": "2",+ "name": "B",+ "type": "passive",+ "description": "B terminal of the variable resistor; terminal voltages are specified from GND to VDD and terminal current is limited to ±20 mA (IMAX)."+ },+ {+ "number": "3",+ "name": "CS/AD0",+ "type": "input",+ "description": "Chip Select input, active low; data is loaded into the DAC register when CS returns high, and in I2C mode this pin is programmable address bit AD0 for multiple-package decoding."+ },+ {+ "number": "4",+ "name": "SDO/NC",+ "type": "output",+ "description": "Serial Data Output is an open-drain transistor that requires an external pull-up resistor, and this pin is a no connect (NC) in the alternate configuration."+ },+ {+ "number": "5",+ "name": "SDI/SDA",+ "type": "bidirectional",+ "description": "Serial Data Input in SPI mode and Serial Data Input/Output (SDA) in I2C mode."+ },+ {+ "number": "6",+ "name": "CLK/SCL",+ "type": "input",+ "description": "Serial clock input, positive-edge triggered (SCL in I2C mode)."+ },+ {+ "number": "7",+ "name": "GND",+ "type": "power_in",+ "description": "Digital ground."+ },+ {+ "number": "8",+ "name": "DIS",+ "type": "input",+ "description": "Digital Interface Select: SPI mode when DIS = 0, I2C mode when DIS = 1."+ },+ {+ "number": "9",+ "name": "VDD",+ "type": "power_in",+ "description": "Positive power supply, specified from 2.7 V to 5.5 V (page 3 power supply range)."+ },+ {+ "number": "10",+ "name": "W",+ "type": "passive",+ "description": "W wiper terminal of the variable resistor; terminal voltages are specified from GND to VDD and terminal current is limited to ±20 mA (IMAX)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Pin 4 (SDO/NC) and pin 5 (SDI/SDA) are multiplexed by interface mode. Types were chosen as output an; Voltage and current limits for the A, B and W terminals (GND to VDD, ±20 mA) come from the Table 1 a; The datasheet's ordering guide gives the 50 kΩ RAB option for AD5161BRMZ50-RL7 on the same 10-lead M"+ ],+ "pages_sent": 7,+ "cost_usd": 0.0387,+ "at": "2026-10-31T03:37:20"+ },+ "datasheet": {+ "url": "https://www.analog.com/media/en/technical-documentation/data-sheets/AD5161.pdf",+ "pages": 20,+ "sha256": "b974abd28e91a958",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 10,+ "described": 10,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "ad5161brmz50-rl7.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 4.9,+ 3,+ 0.95+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "04cd1b024ea547d1988505510f57a28cea7708cb1a89243842764e7f8d280098",+ "checked": "2026-10-31",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "ad5161brmz50-rl7-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 4.9,+ 3,+ 0.95+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "49fe07a40c898cc6c8bf76c4e5479a343960e065e616093eb469b79be1ab98b0",+ "checked": "2026-10-31",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ],+ "package_dims": {+ "package_code": "RM-10",+ "source_page": 19,+ "D": {+ "nom_mm": 3,+ "range_mm": [+ 2.9,+ 3.1+ ]+ },+ "E1": {+ "nom_mm": 3,+ "range_mm": [+ 2.9,+ 3.1+ ]+ },+ "E": {+ "nom_mm": 4.9,+ "range_mm": [+ 4.65,+ 5.15+ ]+ },+ "e": {+ "nom_mm": 0.5,+ "range_mm": [+ null,+ null+ ]+ },+ "A": {+ "nom_mm": 1.1,+ "range_mm": [+ null,+ 1.1+ ]+ },+ "source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",+ "model_check": {+ "file": "ad5161brmz50-rl7.step",+ "verdict": "PASS",+ "reasons": [+ "height and body within the datasheet's package drawing"+ ],+ "by": "factory/package_fit.py"+ }+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}
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