main
Ray Publish 0.1.0 df82e49 5d ago
{
  "slug": "ad5025bruz",
  "version": "0.1.0",
  "type": "component",
  "description": "Analog Devices Digital To Analog Converters (DACs), TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "adc-dac-data conversion",
    "ad5025bruz",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "ad5025bruz.kicad_sym",
    "ad5025bruz.kicad_mod",
    "ad5025bruz.glb",
    "ad5025bruz.step",
    "ad5025bruz.lbr",
    "docs/hero.png",
    "docs/ad5025bruz-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "ad5025bruz-hero.glb",
    "ad5025bruz-hero.overlay.json",
    "ad5025bruz-etched.glb"
  ],
  "component": {
    "mpn": "AD5025BRUZ",
    "manufacturer": "Analog Devices",
    "package": "TSSOP-14",
    "pin_count": 14,
    "category": "ADC/DAC/Data Conversion",
    "subcategory": "Digital To Analog Converters (DACs)",
    "datasheet": "https://www.analog.com/media/en/technical-documentation/data-sheets/AD5025_5045_5065.pdf",
    "parts": {
      "symbol": "ad5025bruz.kicad_sym",
      "footprint": "ad5025bruz.kicad_mod",
      "model_3d": "ad5025bruz-hero.glb",
      "model_3d_plain": "ad5025bruz-etched.glb",
      "model_3d_step": "ad5025bruz-etched.step",
      "model_3d_step_plain": "ad5025bruz.step",
      "lbr": "ad5025bruz.lbr"
    },
    "distributor_links": {
      "lcsc": "C649173",
      "digikey": "505-AD5025BRUZ-ND",
      "mouser": "584-AD5025BRUZ"
    },
    "distributor_check": {
      "checked_at": "2026-10-28T16:04:08Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "505-AD5025BRUZ-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "584-AD5025BRUZ",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "LDAC",
        "type": "input",
        "description": "Pulsing this pin low updates any or all DAC registers from pending input-register data, and it must be brought high after pulsing; it can be tied low only in standalone mode."
      },
      {
        "number": "2",
        "name": "SYNC",
        "type": "input",
        "description": "Active-low frame sync; data is clocked in on the falling edges of the next 32 SCLK clocks, and a SYNC rising edge before the 32nd falling edge aborts the write."
      },
      {
        "number": "3",
        "name": "VDD",
        "type": "power_in",
        "description": "Power supply input operating from 4.5 V to 5.5 V, to be decoupled with 10 µF in parallel with 0.1 µF to GND."
      },
      {
        "number": "4",
        "name": "VREFA",
        "type": "input",
        "description": "Reference voltage input for DAC A, with a reference input range of 2.2 V to VDD."
      },
      {
        "number": "5",
        "name": "VOUTA",
        "type": "output",
        "description": "Analog output voltage from DAC A, driven by a rail-to-rail output amplifier."
      },
      {
        "number": "6",
        "name": "POR",
        "type": "input",
        "description": "Power-on reset select: tying to GND powers up the output at 0 V and tying to VDD powers up at midscale."
      },
      {
        "number": "7",
        "name": "SDO",
        "type": "output",
        "description": "Serial data output for daisy-chaining or diagnostic read-back, changing on the SCLK rising edge and valid on the falling edge."
      },
      {
        "number": "8",
        "name": "CLR",
        "type": "input",
        "description": "Falling-edge-sensitive asynchronous clear that loads the programmed clear code (zero, midscale or full scale) into both DAC registers, with LDAC pulses ignored while low."
      },
      {
        "number": "9",
        "name": "VREFB",
        "type": "input",
        "description": "Reference voltage input for DAC B, with a reference input range of 2.2 V to VDD."
      },
      {
        "number": "10",
        "name": "VOUTB",
        "type": "output",
        "description": "Analog output voltage from DAC B, driven by a rail-to-rail output amplifier."
      },
      {
        "number": "11",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference point for all circuitry on the part."
      },
      {
        "number": "12",
        "name": "PDL",
        "type": "input",
        "description": "Power-down lockout: logic 0 prevents software power-down under any circumstance, and a high-to-low transition exits power-down to the previous DAC code when the part was previously powered down."
      },
      {
        "number": "13",
        "name": "DIN",
        "type": "input",
        "description": "Serial data input into a 32-bit shift register, clocked in on the falling edge of SCLK."
      },
      {
        "number": "14",
        "name": "SCLK",
        "type": "input",
        "description": "Serial clock input with data clocked on the falling edge, supporting rates up to 50 MHz."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Pinout taken from Table 6 and Figure 5 (page 8), which covers the AD5025/AD5045/AD5065 family in the"
        ],
        "pages_sent": 7,
        "cost_usd": 0.0159,
        "at": "2026-10-28T16:03:57"
      },
      "datasheet": {
        "url": "https://www.analog.com/media/en/technical-documentation/data-sheets/AD5025_5045_5065.pdf",
        "pages": 25,
        "sha256": "241f6ad70c0bd4a1",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 14,
        "described": 14,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "ad5025bruz.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          5.0,
          1.0
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "3ee5786aae56190997aa793ba3cfc003fd616782770e29719b4562f012982245",
        "checked": "2026-10-28",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ad5025bruz-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          5.0,
          1.0
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "9288ffcf0327ea58a9b04c049eb4d056f8b9d316bb4d0dc28b0890e7b165bea7",
        "checked": "2026-10-28",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}