component

AD421BRZRL

Public Made by Adom

by adom

Analog Devices Digital To Analog Converters (DAC), SOIC-16-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentdata acquisitionad421brzrlfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 8d ago
viewers ad421brzrl: viewers · Ray 8d ago
ad421brzrl-etched.glb Publish 0.1.0 · Ray 8d ago
ad421brzrl-etched.step ad421brzrl: factory component page (tier=lcsc) · Ray 8d ago
ad421brzrl-hero.glb ad421brzrl: hero GLB from the etched model (keeps the MPN mark) · Ray 8d ago
ad421brzrl-hero.overlay.json Publish 0.1.0 · Ray 8d ago
ad421brzrl.glb Publish 0.1.0 · Ray 8d ago
ad421brzrl.kicad_mod Publish 0.1.0 · Ray 8d ago
ad421brzrl.kicad_sym Publish 0.1.0 · Ray 8d ago
ad421brzrl.lbr Publish 0.1.0 · Ray 8d ago
ad421brzrl.step Publish 0.1.0 · Ray 8d ago
package.json Publish 0.1.0 · Ray 8d ago
page.json Set visibility: public · Ray 8d ago
README.md Publish 0.1.0 · Ray 8d ago

AD421BRZRL

Analog Devices · Digital To Analog Converters (DAC) · SOIC-16-300mil

AD421BRZRL from Analog Devices, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 REF OUT1 output Buffered +1.25 V precision reference output that can supply up to 0.5 mA to external circuitry, and a 100 kΩ resistive load to COM should be added if it must sink current.
2 REF OUT2 output Buffered +2.5 V precision reference output that can supply up to 0.5 mA to external circuitry and is connected to REF IN to use the AD421's own reference.
3 REF IN input Voltage reference input that sets the DAC span, with a nominal +2.5 V required for correct operation.
4 LV input Regulated voltage control input that sets VCC to 5 V nominal when connected to COM, 3.3 V nominal when connected through 0.01 µF to VCC, and 3 V nominal when connected to VCC.
5 LATCH input Logic input whose rising edge loads the serial input shift register into the DAC latch, and the number of clock cycles between latch pulses selects normal or alarm current mode.
6 CLOCK input Data clock input, up to 10 MHz, that clocks DATA in on its rising edge, where 16 clock cycles between LATCH pulses gives normal 4-20 mA data and more than 16 gives alarm current data.
7 DATA input Serial data input that must be valid on the rising edge of CLOCK.
8 LOOP RTN output Loop return output that provides the return path for current flowing in the current loop.
9 COM power_in Common reference potential for the AD421 analog and digital inputs and outputs and for the voltage regulator output.
10 C3 passive Filtering capacitor connection that requires a low dielectric absorption ceramic capacitor between this pin and COM for internal filtering of the switched current sources.
11 C2 passive Filtering capacitor connection that requires a low dielectric absorption ceramic capacitor between this pin and COM, as for C3.
12 C1 passive Filtering capacitor connection that requires a low dielectric absorption ceramic capacitor between this pin and COM, as for C3.
13 DRIVE output Output of the voltage regulator loop that controls the external pass transistor to hold the programmed VCC while providing the bias needed as loop current varies from 4 mA to 20 mA.
14 COMP passive Compensation capacitor input where a capacitor connected between COMP and DRIVE is required to stabilize the regulator feedback loop.
15 BOOST output Open-collector output that sinks the necessary loop current so that the current into BOOST plus the current into COM equals the programmed loop current.
16 VCC power_in Power supply input that biases the AD421 and powers the rest of the transmitter, with VCC decoupled to COM by a 2.2 µF capacitor and the regulator output set by LV to 3 V, 3.3 V or 5 V nominal.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOIC-16-300mil
Category Data Acquisition
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Monotonicity 16 Bits 2
Integral Nonlinearity -0.01 0.01 % of FS FS = Full-Scale Output Current 2
Offset (4 mA) @ +25°C -0.1 0.1 % of FS @ +25°C; VCC = 5 V 2
Offset Drift -25 25 ppm of FS/°C Includes On-Chip Reference Drift 2
Total Output Error (20 mA) @ +25°C -0.2 0.2 % of FS @ +25°C; VCC = 5 V 2
Total Output Drift -50 50 ppm of FS/°C Includes On-Chip Reference Drift 2
VCC Supply Sensitivity (DAC) 25 50 nA/mV 2
REF OUT2 Output Voltage 2.49 2.51 V 2.5 V Nominal 2
REF OUT2 Drift -40 40 ppm/°C Typical 20 ppm/°C from -40°C to +25°C and -2.5 ppm/°C typical from +25°C to +85°C 2
REF OUT2 Externally Available Current 0.5 mA 2
REF OUT2 VCC Supply Sensitivity 15 150 µV/V 2
REF OUT1 Output Voltage 1.24 1.26 V 1.25 V Nominal, 100 kΩ Load to COM 2
REF OUT1 Drift -50 50 ppm/°C Typical 20 ppm/°C from -40°C to +25°C and 2 ppm/°C typical from +25°C to +85°C 2
REF OUT1 Externally Available Current 0.5 mA 2
REF OUT1 VCC Supply Sensitivity 15 150 µV/V 2
VIH (Logic 1) VIH 0.75 × VCC 2
VIL (Logic 0) VIL 0.25 × VCC 2
IIH IIH -10 10 µA VIN = VCC 2
IIL IIL -10 10 µA VIN = 0 V 2
Data Rate 10 Mbps 2
Operating Range 2.95 5.05 V Functional to 7 V 2
Quiescent Current @ VCC = 3 V 475 650 µA @ VCC = 3 V 2
Quiescent Current @ VCC = 5 V 575 750 µA @ VCC = 5 V 2
Current Loop Voltage Compliance 350 V DN25D breakdown voltage 2
Output Voltage (VCC), 3 V Mode VCC 2.95 3.05 V 3 V Nominal. LV pin connected to VCC 2
Output Voltage (VCC), 3.3 V Mode VCC 3.25 3.35 V 3.3 V Nominal. LV pin connected through 0.01 µF to VCC 2
Output Voltage (VCC), 5 V Mode VCC 4.95 5.05 V 5 V Nominal. LV pin connected to COM 2
Externally Available Current 3.25 mA Assuming 4 mA flowing in the loop 2
Data Clock Period tCK 100 ns 3
Data Clock Low Time tCL 50 ns 3
Data Clock High Time tCH 50 ns 3
Data Stable Width tDW 30 ns 3
Data Setup Time tDS 30 ns 3
Data Hold Time tDH 0 ns 3
Latch Delay Time tLD 50 ns 3
Latch Low Time tLL 50 ns 3
Latch High Time tLH 50 ns 3
Operating Temperature Range (Commercial, B Version) -40 85 °C 4
Storage Temperature Range -65 150 °C 4
Junction Temperature 150 °C 4
LOOP RTN to COM -2 0.5 V 4
DRIVE, BOOST, COMP to COM -0.5 V Max printed as VCC + 0.5 V 4
Digital Input Voltage to COM -0.5 V Max printed as VCC + 0.5 V 4
SOIC Package Power Dissipation 450 mW 4
Lead Temperature, Soldering Vapor Phase (60 sec) 215 °C Vapor phase, 60 sec 4
Lead Temperature, Soldering Infrared (15 sec) 220 °C Infrared, 15 sec 4
θJA Thermal Impedance (SOIC) θJA 110 °C/W 4

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing ABS N = Plastic DIP, R = SOIC. ABSOLUTE MAXIMUM RATINGS 4

CAD (KiCad official)

  • Symbol: AD421BRZRL
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16-300mil (KiCad packages3D, STEP)
  • 3D model files: ad421brzrl-etched.step / ad421brzrl-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad421brzrl.step / ad421brzrl.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (14 pp, sha256 ec6f99aa9d457e85, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF