ACT8865QI405-T

{
  "slug": "act8865qi405-t",
  "version": "0.1.0",
  "type": "component",
  "description": "Qorvo DC-DC Converters, TQFN-32-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "power management (pmic)",
    "act8865qi405-t",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
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    "README.md",
    "act8865qi405-t.kicad_sym",
    "act8865qi405-t.kicad_mod",
    "act8865qi405-t.glb",
    "act8865qi405-t.step",
    "act8865qi405-t.lbr",
    "docs/hero.png",
    "docs/act8865qi405-t-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "act8865qi405-t-hero.glb",
    "act8865qi405-t-hero.overlay.json",
    "act8865qi405-t-etched.glb"
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  "component": {
    "mpn": "ACT8865QI405-T",
    "manufacturer": "Qorvo",
    "package": "TQFN-32-EP(4x4)",
    "pin_count": 33,
    "category": "Power Management (PMIC)",
    "subcategory": "DC-DC Converters",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588881810817867776",
    "parts": {
      "symbol": "act8865qi405-t.kicad_sym",
      "footprint": "act8865qi405-t.kicad_mod",
      "model_3d": "act8865qi405-t-hero.glb",
      "model_3d_plain": "act8865qi405-t-etched.glb",
      "model_3d_step": "act8865qi405-t-etched.step",
      "model_3d_step_plain": "act8865qi405-t.step",
      "lbr": "act8865qi405-t.lbr"
    },
    "distributor_links": {
      "lcsc": "C146240",
      "digikey": "2312-ACT8865QI405-TTR-ND",
      "mouser": "107-ACT8865QI405-T"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T07:28:25Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "2312-ACT8865QI405-TTR-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "107-ACT8865QI405-T",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "OUT1",
        "type": "input",
        "description": "Output feedback sense for REG1; connect directly to the output node so the internal feedback network sets the output voltage."
      },
      {
        "number": "2",
        "name": "GA",
        "type": "power_in",
        "description": "Analog ground; connect directly to a quiet ground node and tie GA, GP1, GP2 and GP3 together at a single point as close to the IC as possible."
      },
      {
        "number": "3",
        "name": "OUT4",
        "type": "power_out",
        "description": "REG4 LDO output, capable of up to 320mA; connect a 3.3µF ceramic capacitor from OUT4 to GA, and the output is discharged to GA through 1.5kΩ when disabled."
      },
      {
        "number": "4",
        "name": "OUT5",
        "type": "power_out",
        "description": "REG5 LDO output, capable of up to 320mA; connect a 3.3µF ceramic capacitor from OUT5 to GA, and the output is discharged to GA through 1.5kΩ when disabled."
      },
      {
        "number": "5",
        "name": "INL45",
        "type": "power_in",
        "description": "Power input for REG4 and REG5; bypass to GA with a high-quality ceramic capacitor placed as close to the IC as possible."
      },
      {
        "number": "6",
        "name": "INL67",
        "type": "power_in",
        "description": "Power input for REG6 and REG7; bypass to GA with a high-quality ceramic capacitor placed as close to the IC as possible."
      },
      {
        "number": "7",
        "name": "OUT6",
        "type": "power_out",
        "description": "REG6 LDO output, capable of up to 320mA; connect a 3.3µF ceramic capacitor from OUT6 to GA, and the output is discharged to GA through 1.5kΩ when disabled."
      },
      {
        "number": "8",
        "name": "OUT7",
        "type": "power_out",
        "description": "REG7 LDO output, capable of up to 320mA; connect a 3.3µF ceramic capacitor from OUT7 to GA, and the output is discharged to GA through 1.5kΩ when disabled."
      },
      {
        "number": "9",
        "name": "nPBIN",
        "type": "input",
        "description": "Master enable input: drive through a 50kΩ resistor to GA to enable the IC, or drive directly to GA (low impedance, under 2.5kΩ) to assert manual reset; it is internally pulled up to VDDREF through 35kΩ."
      },
      {
        "number": "10",
        "name": "PWRHLD",
        "type": "input",
        "description": "Power hold input; refer to the Control Sequences section for its function."
      },
      {
        "number": "11",
        "name": "nRSTO",
        "type": "output",
        "description": "Active-low open-drain reset output that asserts on startup or manual reset and requires a 10kΩ or greater pull-up."
      },
      {
        "number": "12",
        "name": "nIRQ",
        "type": "output",
        "description": "Open-drain interrupt output that asserts low when an unmasked fault or interrupt occurs and requires a 10kΩ or greater pull-up."
      },
      {
        "number": "13",
        "name": "nPBSTAT",
        "type": "output",
        "description": "Active-low open-drain push-button status output that is asserted low whenever nPBIN is pushed and is high-Z otherwise."
      },
      {
        "number": "14",
        "name": "GP3",
        "type": "power_in",
        "description": "Power ground for REG3; connect together with GA, GP1 and GP2 at a single point as close to the IC as possible."
      },
      {
        "number": "15",
        "name": "SW3",
        "type": "output",
        "description": "Switching node output for REG3; connect to the switching end of the inductor."
      },
      {
        "number": "16",
        "name": "VP3",
        "type": "power_in",
        "description": "Power input for REG3; bypass to GP3 with a high-quality ceramic capacitor placed as close to the IC as possible."
      },
      {
        "number": "17",
        "name": "PWREN",
        "type": "input",
        "description": "Power enable input; refer to the Control Sequences section for its function."
      },
      {
        "number": "18",
        "name": "NC1",
        "type": "unconnected",
        "description": "Not connected; not internally connected."
      },
      {
        "number": "19",
        "name": "OUT3",
        "type": "input",
        "description": "Output feedback sense for REG3; connect directly to the output node so the internal feedback network sets the output voltage."
      },
      {
        "number": "20",
        "name": "VSEL",
        "type": "input",
        "description": "Step-down DC/DC output voltage selection: drive logic low to select the default output voltage and logic high to select the secondary output voltage."
      },
      {
        "number": "21",
        "name": "SCL",
        "type": "input",
        "description": "Clock input for the I2C serial interface."
      },
      {
        "number": "22",
        "name": "SDA",
        "type": "bidirectional",
        "description": "Data line for the I2C serial interface; data is read on the rising edge of SCL."
      },
      {
        "number": "23",
        "name": "VDDREF",
        "type": "power_in",
        "description": "Power supply for the internal reference; connect directly to the system supply and bypass to GA with a 100nF capacitor placed as close to the IC as possible."
      },
      {
        "number": "24",
        "name": "OUT2",
        "type": "input",
        "description": "Output feedback sense for REG2; connect directly to the output node so the internal feedback network sets the output voltage."
      },
      {
        "number": "25",
        "name": "NC2",
        "type": "unconnected",
        "description": "Not connected; not internally connected."
      },
      {
        "number": "26",
        "name": "VP2",
        "type": "power_in",
        "description": "Power input for REG2 and system control; bypass to GP2 with a high-quality ceramic capacitor placed as close to the IC as possible."
      },
      {
        "number": "27",
        "name": "SW2",
        "type": "output",
        "description": "Switching node output for REG2; connect to the switching end of the inductor."
      },
      {
        "number": "28",
        "name": "GP2",
        "type": "power_in",
        "description": "Power ground for REG2; connect together with GA, GP1 and GP3 at a single point as close to the IC as possible."
      },
      {
        "number": "29",
        "name": "GP1",
        "type": "power_in",
        "description": "Power ground for REG1; connect together with GA, GP2 and GP3 at a single point as close to the IC as possible."
      },
      {
        "number": "30",
        "name": "SW1",
        "type": "output",
        "description": "Switching node output for REG1; connect to the switching end of the inductor."
      },
      {
        "number": "31",
        "name": "VP1",
        "type": "power_in",
        "description": "Power input for REG1; bypass to GP1 with a high-quality ceramic capacitor placed as close to the IC as possible."
      },
      {
        "number": "32",
        "name": "REFBP",
        "type": "passive",
        "description": "Reference bypass; connect a 0.047µF ceramic capacitor from REFBP to GA, and it is discharged to GA in shutdown."
      },
      {
        "number": "33",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Package naming differs from the hint: the datasheet calls it TQFN44-32 (4x4mm, 32 pins) and the orde; The top-view pin configuration figure is image-only in the provided text, so pin positions were not ; KiCad type choices that are judgment, not stated in the datasheet: OUT1, OUT2, OUT3 are feedback sen",
          "exposed pad 33 added from the footprint",
          "dropped thermal pad ['EP'] absent from footprint"
        ],
        "pages_sent": 13,
        "cost_usd": 0.0883,
        "at": "2026-10-18T07:26:36"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588881810817867776",
        "pages": 31,
        "sha256": "acdd6c9bcd6c6483",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 33,
        "described": 33,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
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        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
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        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "7b482a511cdf2cf875c31931f9fea7f745b8dac2ea6203531cd6604f40a290cb",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "act8865qi405-t-etched.step",
        "role": "eda",
        "up": "Z",
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        "origin": "footprint origin = pad-pattern centre",
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        "sha256": "d62e672bf0fbcb6c665cc7e0d26ccd64fa7bb78935f11264af36eb9ca752ecd6",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
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  }
}