component
ACS711ELCTR-12AB-T
Public Made by Adomby adom
Allegro MicroSystems LLC Current Sensors, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
acs711elctr-12ab-t: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
e85cb03
22h ago
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{
"schema_version": 1,
"type": "component",
"slug": "acs711elctr-12ab-t",
"title": "ACS711ELCTR-12AB-T",
"brief": "Allegro MicroSystems LLC Current Sensors, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
"version": "0.2.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"sensor",
"acs711elctr-12ab-t"
],
"component": {
"mpn": "ACS711ELCTR-12AB-T",
"manufacturer": "Allegro MicroSystems LLC",
"package": "SOP-8",
"pin_count": 8,
"category": "Sensor",
"subcategory": "Current Sensors",
"datasheet": "https://datasheet.lcsc.com/datasheet/pdf/dad4347fe975493a99bead71529d17fb.pdf",
"parts": {
"symbol": "acs711elctr-12ab-t.kicad_sym",
"footprint": "acs711elctr-12ab-t.kicad_mod",
"model_3d": "acs711elctr-12ab-t-etched.glb",
"model_3d_plain": "acs711elctr-12ab-t.glb",
"model_3d_step": "acs711elctr-12ab-t-etched.step",
"model_3d_step_plain": "acs711elctr-12ab-t.step",
"lbr": "acs711elctr-12ab-t.lbr"
},
"distributor_links": {
"lcsc": "C114267"
},
"pins": [
{
"number": "1",
"name": "IP+",
"type": "passive",
"description": "Terminal for current being sensed (positive side of the internal copper conduction path). Pins 1 and 2 are fused internally and must be tied together on the PCB. Working voltage between the IP+/IP- side and IC side is rated to 100 VAC peak or VDC (basic isolation)."
},
{
"number": "2",
"name": "IP+",
"type": "passive",
"description": "Terminal for current being sensed (positive side of the internal copper conduction path). Fused internally with pin 1; tie both externally to carry the primary current."
},
{
"number": "3",
"name": "IP-",
"type": "passive",
"description": "Terminal for current being sensed (negative/return side of the internal copper conduction path). Fused internally with pin 4; tie both externally. Primary conductor resistance is ~1.2 mΩ for the LC package."
},
{
"number": "4",
"name": "IP-",
"type": "passive",
"description": "Terminal for current being sensed (negative/return side of the internal copper conduction path). Fused internally with pin 3; tie both externally."
},
{
"number": "5",
"name": "GND",
"type": "power_in",
"description": "Signal ground terminal for the IC (isolated from the IP+/IP- current path)."
},
{
"number": "6",
"name": "FAULT",
"type": "output",
"description": "Overcurrent fault output, active low, open-drain style requiring an external pull-up (RPU ≥ 1 kΩ, typ. to VCC). Trips and latches when |IP| exceeds ±100% of the full-scale range (±12.5 A for the 12AB variant); response time ~1.3 µs. Cleared only by cycling VCC below VCCFR (200 mV max) for at least tCCFR (100 µs)."
},
{
"number": "7",
"name": "VIOUT",
"type": "output",
"description": "Analog output voltage, ratiometric to VCC, with positive slope proportional to current flowing from IP+ to IP-. Quiescent output is VCC/2 at IP=0 A; sensitivity is 110 mV/A (typ) for the 12AB variant. Drives up to CLOAD=1 nF with RLOAD ≥ 15 kΩ."
},
{
"number": "8",
"name": "VCC",
"type": "power_in",
"description": "Device power supply terminal. Operates from 3 to 5.5 V single supply (3.3 V nominal); ICC ~4 mA typ, 5.5 mA max. Bypass with 0.1 µF (CBYP) to GND close to the pin."
}
],
"provenance": {
"extractor": "ds2sf",
"datasheet": {
"url": "https://datasheet.lcsc.com/datasheet/pdf/dad4347fe975493a99bead71529d17fb.pdf",
"pages": 18,
"sha256": "6fb6310c420b9503",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 8,
"described": 8,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"pin1": {
"pad": "1",
"at": [
-2.475,
-1.905
],
"corner": "top-left",
"source": "silk-marker",
"derived_from": "SOIC-8_3.9x4.9mm_P1.27mm@sha256:074ecb2092b24fa4",
"mark": "drawn"
},
"models_3d": [
{
"file": "acs711elctr-12ab-t.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.0,
4.9,
1.75
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "acs711elctr-12ab-t-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.0,
4.9,
1.75
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "be705407caa08faef3661bff672873a40450c8bbc7c3fbeb65a828e849d524c3",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "Allegro MicroSystems LLC",
"Package": "SOP-8",
"Category": "Sensor",
"Pins": "8"
}
},
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"acs711elctr-12ab-t"
],
"discovery_pitch": "ACS711ELCTR-12AB-T (Allegro MicroSystems LLC) component page with datasheet-verified CAD.",
"author": {
"name": "Ray",
"email": "[email protected]"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"acs711elctr-12ab-t.kicad_sym",
"acs711elctr-12ab-t.kicad_mod",
"acs711elctr-12ab-t.glb",
"acs711elctr-12ab-t.step",
"acs711elctr-12ab-t-etched.step",
"acs711elctr-12ab-t.lbr",
"docs/hero.png",
"docs/acs711elctr-12ab-t-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html"
],
"visibility": {
"public": true
},
"updated_at": "2026-09-24T15:29:38.394Z"
}