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ACS711ELCTR-12AB-T

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Allegro MicroSystems LLC Current Sensors, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs acs711elctr-12ab-t: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
acs711elctr-12ab-t-etched.fit.json acs711elctr-12ab-t: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
acs711elctr-12ab-t-etched.glb acs711elctr-12ab-t: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
acs711elctr-12ab-t-etched.step acs711elctr-12ab-t: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
acs711elctr-12ab-t.glb Publish 0.1.0 · Ray 1mo ago
acs711elctr-12ab-t.kicad_mod Publish 0.1.0 · Ray 1mo ago
acs711elctr-12ab-t.kicad_sym Publish 0.1.0 · Ray 1mo ago
acs711elctr-12ab-t.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect and oval pad as a SQUARE EAGLE smd; this carries the real pad shape across (0 -> 8 rounded pads) and stops dropping geometry drawn on KiCad User.N layers. Attributes, connects, pads and the pin-1 marker are gated against decreasing and are unchanged. · Ray 1mo ago
acs711elctr-12ab-t.step Publish 0.1.0 · Ray 1mo ago
package.json Publish 0.2.0 · Ray 1mo ago
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
page.json acs711elctr-12ab-t: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 21h ago
README.md acs711elctr-12ab-t: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 20d ago

ACS711ELCTR-12AB-T

Allegro MicroSystems LLC · Current Sensors · SOP-8

ACS711ELCTR-12AB-T from Allegro MicroSystems LLC, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IP+ passive Terminal for current being sensed (positive side of the internal copper conduction path). Pins 1 and 2 are fused internally and must be tied together on the PCB. Working voltage between the IP+/IP- side and IC side is rated to 100 VAC peak or VDC (basic isolation).
2 IP+ passive Terminal for current being sensed (positive side of the internal copper conduction path). Fused internally with pin 1; tie both externally to carry the primary current.
3 IP- passive Terminal for current being sensed (negative/return side of the internal copper conduction path). Fused internally with pin 4; tie both externally. Primary conductor resistance is ~1.2 mΩ for the LC package.
4 IP- passive Terminal for current being sensed (negative/return side of the internal copper conduction path). Fused internally with pin 3; tie both externally.
5 GND power_in Signal ground terminal for the IC (isolated from the IP+/IP- current path).
6 FAULT output Overcurrent fault output, active low, open-drain style requiring an external pull-up (RPU ≥ 1 kΩ, typ. to VCC). Trips and latches when
7 VIOUT output Analog output voltage, ratiometric to VCC, with positive slope proportional to current flowing from IP+ to IP-. Quiescent output is VCC/2 at IP=0 A; sensitivity is 110 mV/A (typ) for the 12AB variant. Drives up to CLOAD=1 nF with RLOAD ≥ 15 kΩ.
8 VCC power_in Device power supply terminal. Operates from 3 to 5.5 V single supply (3.3 V nominal); ICC ~4 mA typ, 5.5 mA max. Bypass with 0.1 µF (CBYP) to GND close to the pin.

Key specifications

Parameter Value
Manufacturer Allegro MicroSystems LLC
Package SOP-8
Category Sensor
Pins 8

Ordering variants

  • ACS711ELCTR-12AB-T
  • ACS711ELCTR-12AB-TKLCTR-12AB-T
  • ACS711ELCTR-12AB-TELCTR-25AB-T
  • ACS711ELCTR-12AB-TKLCTR-25AB-T
  • ACS711ELCTR-12AB-TEEXLT-31AB-T
  • ACS711ELCTR-12AB-TKEXLT-31AB-T
  • ACS711ELCTR-12AB-TEEXLT-15AB-T
  • ACS711ELCTR-12AB-TKEXLT-15AB-T

CAD (KiCad official)

  • Symbol: ACS711ELCTR-12AB-T
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: acs711elctr-12ab-t-etched.step / acs711elctr-12ab-t-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); acs711elctr-12ab-t.step / acs711elctr-12ab-t.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
acs711elctr-12ab-t.step 122 KB You want the bare part, or you mark your own boards.
acs711elctr-12ab-t-etched.step 2.6 MB You want the part with ACS711ELCTR-12AB-T already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 664 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Allegro MicroSystems LLC datasheet (18 pp, sha256 6fb6310c420b9503, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF